| /external/llvm/lib/Target/NVPTX/ |
| NVPTXFrameLowering.cpp | 36 MachineBasicBlock::iterator MBBI = MBB.begin();
45 MachineInstr *MI = BuildMI(MBB, MBBI, dl,
52 MachineInstr *MI = BuildMI(MBB, MBBI, dl,
63 BuildMI(MBB, MBBI, dl,
67 BuildMI(MBB, MBBI, dl,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 34 MachineBasicBlock::iterator MBBI = MBB.begin();
35 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
55 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
61 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
63 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
65 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
72 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
75 DebugLoc dl = MBBI->getDebugLoc();
76 assert(MBBI->getOpcode() == SP::RETL &
[all...] |
| SparcInstrInfo.cpp | 346 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
354 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 34 MachineBasicBlock::iterator MBBI = MBB.begin();
35 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
43 BuildMI(MBB, MBBI, dl, TII.get(Mips::SaveRaF16)).addImm(StackSize);
48 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
52 DebugLoc dl = MBBI->getDebugLoc();
61 BuildMI(MBB, MBBI, dl, TII.get(Mips::RestoreRaF16)).addImm(StackSize);
|
| MipsSEFrameLowering.cpp | 38 MachineBasicBlock::iterator MBBI = MBB.begin();
39 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
56 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
60 BuildMI(MBB, MBBI, dl,
72 ++MBBI;
77 BuildMI(MBB, MBBI, dl,
110 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
114 BuildMI(MBB, MBBI, dl,
124 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr()
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 35 MachineBasicBlock::iterator MBBI;
67 /// before MBBI. One bit per physical register. If bit is set that means it's
95 while (MBBI != I) forward();
100 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
125 return scavengeRegister(RegClass, MBBI, SPAdj);
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 62 MachineBasicBlock::iterator MBBI = Tail;
65 --MBBI;
74 while (Count && MBBI != E) {
75 if (MBBI->isDebugValue()) {
76 --MBBI;
79 if (MBBI->getOpcode() == ARM::t2IT) {
80 unsigned Mask = MBBI->getOperand(1).getImm();
82 MBBI->eraseFromParent();
86 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn);
90 --MBBI;
[all...] |
| Thumb1FrameLowering.cpp | 38 MachineBasicBlock::iterator &MBBI,
42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
48 MachineBasicBlock::iterator MBBI = MBB.begin();
59 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
73 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
78 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
117 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
118 ++MBBI;
[all...] |
| Thumb2ITBlockPass.cpp | 165 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
166 while (MBBI != E) {
167 MachineInstr *MI = &*MBBI;
172 ++MBBI;
181 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
190 ++MBBI;
197 for (; MBBI != E && Pos &&
198 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
199 if (MBBI->isDebugValue())
202 MachineInstr *NMI = &*MBBI;
[all...] |
| ARMExpandPseudoInsts.cpp | 57 MachineBasicBlock::iterator MBBI);
59 void ExpandVLD(MachineBasicBlock::iterator &MBBI);
60 void ExpandVST(MachineBasicBlock::iterator &MBBI);
61 void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
62 void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
65 MachineBasicBlock::iterator &MBBI);
374 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) {
375 MachineInstr &MI = *MBBI;
383 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
439 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
[all...] |
| ARMFrameLowering.cpp | 121 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
125 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
128 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
134 MachineBasicBlock::iterator MBBI = MBB.begin();
147 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
162 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -VARegSaveSize,
167 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
212 if (GPRCS1Size > 0) MBBI++;
223 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUFrameLowering.cpp | 93 MachineBasicBlock::iterator MBBI = MBB.begin();
98 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
104 // Move MBBI back to the beginning of the function.
105 MBBI = MBB.begin();
120 BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(FrameLabel);
125 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
129 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
132 BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
137 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 286 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
291 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
|
| MBlazeFrameLowering.cpp | 347 MachineBasicBlock::iterator MBBI = MBB.begin();
348 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
366 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1)
371 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
377 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
381 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19)
388 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
394 DebugLoc dl = MBBI->getDebugLoc();
405 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADD), MBlaze::R1
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
83 ++MBBI;
85 if (MBBI != MBB.end())
86 DL = MBBI->getDebugLoc()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 80 MachineBasicBlock::iterator MBBI = MBB.begin();
83 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
166 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
167 unsigned RetOpcode = MBBI->getOpcode();
173 MachineBasicBlock::iterator MBBI = prior(MBB.end());
174 DebugLoc dl = MBBI->getDebugLoc();
179 MachineBasicBlock::iterator MBBI = prior(MBB.end());
191 if (STI.hasV4TOps() && MBBI->getOpcode() == Hexagon::JMPR
194 MBB.erase(MBBI);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 243 MachineBasicBlock::iterator MBBI = I;
244 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
246 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
249 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr), StackReg)
|
| PPCFrameLowering.cpp | 57 MachineBasicBlock::iterator MBBI = MI;
58 ++MBBI;
59 assert(MBBI != Entry->end() && MBBI->getOpcode() == PPC::MTVRSAVE);
60 MBBI->eraseFromParent();
69 for (MBBI = I->end(); MBBI != I->begin(); ) {
70 --MBBI;
71 if (MBBI->getOpcode() == PPC::MTVRSAVE) {
72 MBBI->eraseFromParent(); // remove it
[all...] |
| PPCISelDAGToDAG.cpp | 254 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
259 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
260 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
263 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8));
264 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR8), GlobalBaseReg);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin();
98 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
105 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
134 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
141 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
155 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII);
160 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel);
171 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
176 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label)
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineFunction.cpp | 118 MachineFunction::iterator MBBI, E = end();
120 MBBI = begin();
122 MBBI = MBB;
126 if (MBBI != begin())
127 BlockNo = prior(MBBI)->getNumber()+1;
129 for (; MBBI != E; ++MBBI, ++BlockNo) {
130 if (MBBI->getNumber() != (int)BlockNo) {
132 if (MBBI->getNumber() != -1) {
133 assert(MBBNumbering[MBBI->getNumber()] == &*MBBI &
[all...] |
| SplitKit.cpp | 644 MachineBasicBlock::iterator MBBI(MI);
646 do AtBegin = MBBI == MBB->begin();
647 while (!AtBegin && (--MBBI)->isDebugValue());
664 if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) {
668 SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot();
669 DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI);
[all...] |
| BranchFolding.cpp | 418 MachineFunction::iterator MBBI = &CurMBB;
420 CurMBB.getParent()->insert(++MBBI, NewMBB);
[all...] |
| MachineVerifier.cpp | 311 for (MachineBasicBlock::const_instr_iterator MBBI = MFI->instr_begin(),
312 MBBE = MFI->instr_end(); MBBI != MBBE; ++MBBI) {
313 if (MBBI->getParent() != MFI) {
315 *OS << "Instruction: " << *MBBI;
319 if (!MBBI->isInsideBundle()) {
322 CurBundle = MBBI;
325 report("No bundle header", MBBI);
326 visitMachineInstrBefore(MBBI);
327 for (unsigned I = 0, E = MBBI->getNumOperands(); I != E; ++I
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | [all...] |
