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      1 /******************************************************************************
      2  *
      3  *  Copyright (C) 2009-2012 Broadcom Corporation
      4  *
      5  *  Licensed under the Apache License, Version 2.0 (the "License");
      6  *  you may not use this file except in compliance with the License.
      7  *  You may obtain a copy of the License at:
      8  *
      9  *  http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  *  Unless required by applicable law or agreed to in writing, software
     12  *  distributed under the License is distributed on an "AS IS" BASIS,
     13  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  *  See the License for the specific language governing permissions and
     15  *  limitations under the License.
     16  *
     17  ******************************************************************************/
     18 
     19 /******************************************************************************
     20  *
     21  *  Filename:      bt_vendor_brcm.h
     22  *
     23  *  Description:   A wrapper header file of bt_vendor_lib.h
     24  *
     25  *                 Contains definitions specific for interfacing with Broadcom
     26  *                 Bluetooth chipsets
     27  *
     28  ******************************************************************************/
     29 
     30 #ifndef BT_VENDOR_BRCM_H
     31 #define BT_VENDOR_BRCM_H
     32 
     33 #include "bt_vendor_lib.h"
     34 #include "vnd_buildcfg.h"
     35 
     36 /******************************************************************************
     37 **  Constants & Macros
     38 ******************************************************************************/
     39 
     40 #ifndef FALSE
     41 #define FALSE  0
     42 #endif
     43 
     44 #ifndef TRUE
     45 #define TRUE   (!FALSE)
     46 #endif
     47 
     48 #ifndef VENDOR_LIB_RUNTIME_TUNING_ENABLED
     49 #define VENDOR_LIB_RUNTIME_TUNING_ENABLED   FALSE
     50 #endif
     51 
     52 /* Run-time configuration file */
     53 #ifndef VENDOR_LIB_CONF_FILE
     54 #define VENDOR_LIB_CONF_FILE "/etc/bluetooth/bt_vendor.conf"
     55 #endif
     56 
     57 /* Device port name where Bluetooth controller attached */
     58 #ifndef BLUETOOTH_UART_DEVICE_PORT
     59 #define BLUETOOTH_UART_DEVICE_PORT      "/dev/ttyO1"    /* maguro */
     60 #endif
     61 
     62 /* Location of firmware patch files */
     63 #ifndef FW_PATCHFILE_LOCATION
     64 #define FW_PATCHFILE_LOCATION "/vendor/firmware/"  /* maguro */
     65 #endif
     66 
     67 #ifndef UART_TARGET_BAUD_RATE
     68 #define UART_TARGET_BAUD_RATE           3000000
     69 #endif
     70 
     71 /* The millisecond delay pauses on HCI transport after firmware patches
     72  * were downloaded. This gives some time for firmware to restart with
     73  * patches before host attempts to send down any HCI commands.
     74  *
     75  * Note: It has been discovered that BCM43241B0 needs at least 200ms
     76  * settlement delay in here. Without the delay, a Hardware Error event
     77  * from BCM43241B0 had been seen in HCI upstream path right after the
     78  * host sent the HCI_VSC_SET_BDADDR commad to the controller at higher
     79  * baud.
     80  */
     81 #ifndef FW_PATCH_SETTLEMENT_DELAY_MS
     82 #define FW_PATCH_SETTLEMENT_DELAY_MS          0
     83 #endif
     84 
     85 /* The Bluetooth Device Aaddress source switch:
     86  *
     87  * -FALSE- (default value)
     88  *  Get the factory BDADDR from device's file system. Normally the BDADDR is
     89  *  stored in the location pointed by the PROPERTY_BT_BDADDR_PATH (defined in
     90  *  btif_common.h file) property.
     91  *
     92  * -TRUE-
     93  *  If the Bluetooth Controller has equipped with a non-volatile memory (such
     94  *  as BCM4330's OTP memory), the factory BDADDR can be stored in there and
     95  *  retrieved by the stack while enabling BT.
     96  *  !!! WARNING !!! Make sure that the OTP feature has been enabled in the
     97  *  firmware patchram (.hcd) file.
     98  */
     99 #ifndef USE_CONTROLLER_BDADDR
    100 #define USE_CONTROLLER_BDADDR   FALSE
    101 #endif
    102 
    103 /* sleep mode
    104 
    105     0: disable
    106     1: UART with Host wake/BT wake out of band signals
    107 */
    108 #ifndef LPM_SLEEP_MODE
    109 #define LPM_SLEEP_MODE                  1
    110 #endif
    111 
    112 /* Host Stack Idle Threshold in 300ms or 25ms
    113 
    114   In sleep mode 1, this is the number of firmware loops executed with no
    115     activity before the Host wake line is deasserted. Activity includes HCI
    116     traffic excluding certain sleep mode commands and the presence of SCO
    117     connections if the "Allow Host Sleep During SCO" flag is not set to 1.
    118     Each count of this parameter is roughly equivalent to 300ms or 25ms.
    119 */
    120 #ifndef LPM_IDLE_THRESHOLD
    121 #define LPM_IDLE_THRESHOLD              1
    122 #endif
    123 
    124 /* Host Controller Idle Threshold in 300ms or 25ms
    125 
    126     This is the number of firmware loops executed with no activity before the
    127     HC is considered idle. Depending on the mode, HC may then attempt to sleep.
    128     Activity includes HCI traffic excluding certain sleep mode commands and
    129     the presence of ACL/SCO connections.
    130 */
    131 #ifndef LPM_HC_IDLE_THRESHOLD
    132 #define LPM_HC_IDLE_THRESHOLD           1
    133 #endif
    134 
    135 /* BT_WAKE Polarity - 0=Active Low, 1= Active High */
    136 #ifndef LPM_BT_WAKE_POLARITY
    137 #define LPM_BT_WAKE_POLARITY            1    /* maguro */
    138 #endif
    139 
    140 /* HOST_WAKE Polarity - 0=Active Low, 1= Active High */
    141 #ifndef LPM_HOST_WAKE_POLARITY
    142 #define LPM_HOST_WAKE_POLARITY          1    /* maguro */
    143 #endif
    144 
    145 /* LPM_ALLOW_HOST_SLEEP_DURING_SCO
    146 
    147     When this flag is set to 0, the host is not allowed to sleep while
    148     an SCO is active. In sleep mode 1, the device will keep the host
    149     wake line asserted while an SCO is active.
    150     When this flag is set to 1, the host can sleep while an SCO is active.
    151     This flag should only be set to 1 if SCO traffic is directed to the PCM
    152     interface.
    153 */
    154 #ifndef LPM_ALLOW_HOST_SLEEP_DURING_SCO
    155 #define LPM_ALLOW_HOST_SLEEP_DURING_SCO 1
    156 #endif
    157 
    158 /* LPM_COMBINE_SLEEP_MODE_AND_LPM
    159 
    160     In Mode 0, always set byte 7 to 0. In sleep mode 1, device always
    161     requires permission to sleep between scans / periodic inquiries regardless
    162     of the setting of this byte. In sleep mode 1, if byte is set, device must
    163     have "permission" to sleep during the low power modes of sniff, hold, and
    164     park. If byte is not set, device can sleep without permission during these
    165     modes. Permission to sleep in Mode 1 is obtained if the BT_WAKE signal is
    166     not asserted.
    167 */
    168 #ifndef LPM_COMBINE_SLEEP_MODE_AND_LPM
    169 #define LPM_COMBINE_SLEEP_MODE_AND_LPM  1
    170 #endif
    171 
    172 /* LPM_ENABLE_UART_TXD_TRI_STATE
    173 
    174     When set to 0, the device will not tristate its UART TX line before going
    175     to sleep.
    176     When set to 1, the device will tristate its UART TX line before going to
    177     sleep.
    178 */
    179 #ifndef LPM_ENABLE_UART_TXD_TRI_STATE
    180 #define LPM_ENABLE_UART_TXD_TRI_STATE   0
    181 #endif
    182 
    183 /* LPM_PULSED_HOST_WAKE
    184 */
    185 #ifndef LPM_PULSED_HOST_WAKE
    186 #define LPM_PULSED_HOST_WAKE            0
    187 #endif
    188 
    189 /* LPM_IDLE_TIMEOUT_MULTIPLE
    190 
    191     The multiple factor of host stack idle threshold in 300ms/25ms
    192 */
    193 #ifndef LPM_IDLE_TIMEOUT_MULTIPLE
    194 #define LPM_IDLE_TIMEOUT_MULTIPLE       10
    195 #endif
    196 
    197 /* BT_WAKE_VIA_USERIAL_IOCTL
    198 
    199     Use userial ioctl function to control BT_WAKE signal
    200 */
    201 #ifndef BT_WAKE_VIA_USERIAL_IOCTL
    202 #define BT_WAKE_VIA_USERIAL_IOCTL       FALSE
    203 #endif
    204 
    205 /* BT_WAKE_VIA_PROC
    206 
    207     LPM & BT_WAKE control through PROC nodes
    208 */
    209 #ifndef BT_WAKE_VIA_PROC
    210 #define BT_WAKE_VIA_PROC       FALSE
    211 #endif
    212 
    213 /* SCO_CFG_INCLUDED
    214 
    215     Do SCO configuration by default. If the firmware patch had been embedded
    216     with desired SCO configuration, set this FALSE to bypass configuration
    217     from host software.
    218 */
    219 #ifndef SCO_CFG_INCLUDED
    220 #define SCO_CFG_INCLUDED                TRUE
    221 #endif
    222 
    223 #ifndef SCO_USE_I2S_INTERFACE
    224 #define SCO_USE_I2S_INTERFACE           FALSE
    225 #endif
    226 
    227 #if (SCO_USE_I2S_INTERFACE == TRUE)
    228 #define SCO_I2SPCM_PARAM_SIZE           4
    229 
    230 /* SCO_I2SPCM_IF_MODE - 0=Disable, 1=Enable */
    231 #ifndef SCO_I2SPCM_IF_MODE
    232 #define SCO_I2SPCM_IF_MODE              1
    233 #endif
    234 
    235 /* SCO_I2SPCM_IF_ROLE - 0=Slave, 1=Master */
    236 #ifndef SCO_I2SPCM_IF_ROLE
    237 #define SCO_I2SPCM_IF_ROLE              1
    238 #endif
    239 
    240 /* SCO_I2SPCM_IF_SAMPLE_RATE
    241 
    242     0 : 8K
    243     1 : 16K
    244     2 : 4K
    245 */
    246 #ifndef SCO_I2SPCM_IF_SAMPLE_RATE
    247 #define SCO_I2SPCM_IF_SAMPLE_RATE       0
    248 #endif
    249 
    250 /* SCO_I2SPCM_IF_CLOCK_RATE
    251 
    252     0 : 128K
    253     1 : 256K
    254     2 : 512K
    255     3 : 1024K
    256     4 : 2048K
    257 */
    258 #ifndef SCO_I2SPCM_IF_CLOCK_RATE
    259 #define SCO_I2SPCM_IF_CLOCK_RATE        1
    260 #endif
    261 #endif // SCO_USE_I2S_INTERFACE
    262 
    263 
    264 #define SCO_PCM_PARAM_SIZE              5
    265 
    266 /* SCO_PCM_ROUTING
    267 
    268     0 : PCM
    269     1 : Transport
    270     2 : Codec
    271     3 : I2S
    272 */
    273 #ifndef SCO_PCM_ROUTING
    274 #define SCO_PCM_ROUTING                 0
    275 #endif
    276 
    277 /* SCO_PCM_IF_CLOCK_RATE
    278 
    279     0 : 128K
    280     1 : 256K
    281     2 : 512K
    282     3 : 1024K
    283     4 : 2048K
    284 */
    285 #ifndef SCO_PCM_IF_CLOCK_RATE
    286 #define SCO_PCM_IF_CLOCK_RATE           4
    287 #endif
    288 
    289 /* SCO_PCM_IF_FRAME_TYPE - 0=Short, 1=Long */
    290 #ifndef SCO_PCM_IF_FRAME_TYPE
    291 #define SCO_PCM_IF_FRAME_TYPE           0
    292 #endif
    293 
    294 /* SCO_PCM_IF_SYNC_MODE - 0=Slave, 1=Master */
    295 #ifndef SCO_PCM_IF_SYNC_MODE
    296 #define SCO_PCM_IF_SYNC_MODE            0
    297 #endif
    298 
    299 /* SCO_PCM_IF_CLOCK_MODE - 0=Slave, 1=Master */
    300 #ifndef SCO_PCM_IF_CLOCK_MODE
    301 #define SCO_PCM_IF_CLOCK_MODE           0
    302 #endif
    303 
    304 #define PCM_DATA_FORMAT_PARAM_SIZE      5
    305 
    306 /* PCM_DATA_FMT_SHIFT_MODE
    307 
    308     0 : MSB first
    309     1 : LSB first
    310 */
    311 #ifndef PCM_DATA_FMT_SHIFT_MODE
    312 #define PCM_DATA_FMT_SHIFT_MODE         0
    313 #endif
    314 
    315 /* PCM_DATA_FMT_FILL_BITS
    316 
    317     Specifies the value with which to fill unused bits
    318     if Fill_Method is set to programmable
    319 */
    320 #ifndef PCM_DATA_FMT_FILL_BITS
    321 #define PCM_DATA_FMT_FILL_BITS          0
    322 #endif
    323 
    324 /* PCM_DATA_FMT_FILL_METHOD
    325 
    326     0 : 0's
    327     1 : 1's
    328     2 : Signed
    329     3 : Programmable
    330 */
    331 #ifndef PCM_DATA_FMT_FILL_METHOD
    332 #define PCM_DATA_FMT_FILL_METHOD        3
    333 #endif
    334 
    335 /* PCM_DATA_FMT_FILL_NUM
    336 
    337     Specifies the number of bits to be filled
    338 */
    339 #ifndef PCM_DATA_FMT_FILL_NUM
    340 #define PCM_DATA_FMT_FILL_NUM           3
    341 #endif
    342 
    343 /* PCM_DATA_FMT_JUSTIFY_MODE
    344 
    345     0 : Left justify (fill data shifted out last)
    346     1 : Right justify (fill data shifted out first)
    347 */
    348 #ifndef PCM_DATA_FMT_JUSTIFY_MODE
    349 #define PCM_DATA_FMT_JUSTIFY_MODE       0
    350 #endif
    351 
    352 /******************************************************************************
    353 **  Extern variables and functions
    354 ******************************************************************************/
    355 
    356 extern bt_vendor_callbacks_t *bt_vendor_cbacks;
    357 
    358 #endif /* BT_VENDOR_BRCM_H */
    359 
    360