| /external/llvm/unittests/VMCore/ |
| IRBuilderTest.cpp | 78 BasicBlock *TBB = BasicBlock::Create(getGlobalContext(), "", F);
81 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB);
85 EXPECT_EQ(TBB, TI->getSuccessor(0));
90 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights);
94 EXPECT_EQ(TBB, TI->getSuccessor(0));
|
| /external/llvm/lib/CodeGen/ |
| CodePlacementOpt.cpp | 77 MachineBasicBlock *TBB = 0, *FBB = 0;
79 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
85 if (Cond.empty() && TBB)
106 MachineBasicBlock *TBB = 0, *FBB = 0;
109 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
|
| EarlyIfConversion.cpp | 71 // | [TF]BB FBB TBB
76 // Instructions in the conditional blocks TBB and/or FBB are spliced into the
93 MachineBasicBlock *TBB;
98 /// isTriangle - When there is no 'else' block, either TBB or FBB will be
100 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
103 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
135 /// Insertion point in Head for speculatively executed instructions form TBB
341 TBB = FBB = Tail = 0;
388 if (TII->AnalyzeBranch(*Head, TBB, FBB, Cond))
[all...] |
| MachineBasicBlock.cpp | 351 MachineBasicBlock *TBB = 0, *FBB = 0;
354 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
358 if (TBB) {
361 if (isLayoutSuccessor(TBB))
370 assert(!TBB && "Found more than one non-landing-pad successor!");
371 TBB = *SI;
376 if (!TBB)
381 if (!isLayoutSuccessor(TBB))
382 TII->InsertBranch(*this, TBB, 0, Cond, dl);
389 if (isLayoutSuccessor(TBB)) {
[all...] |
| MachineBlockPlacement.cpp | [all...] |
| BranchFolding.cpp | 198 MachineBasicBlock *MBB = I, *TBB = 0, *FBB = 0;
200 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
201 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
463 MachineBasicBlock *TBB = 0, *FBB = 0;
467 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
469 if (TBB == NextBB && !Cond.empty() && !FBB) {
[all...] |
| IfConversion.cpp | 82 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
215 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
221 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
815 // TBB FBB
832 // | TBB
855 // | TBB---> exit
[all...] |
| MachineLICM.cpp | 804 MachineBasicBlock *TBB = 0, *FBB = 0;
806 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
[all...] |
| MachineVerifier.cpp | 527 MachineBasicBlock *TBB = 0, *FBB = 0;
530 TBB, FBB, Cond)) {
533 if (!TBB && !FBB) {
561 } else if (TBB && !FBB && Cond.empty()) {
566 } else if (!MBB->isSuccessor(TBB)) {
580 } else if (TBB && !FBB && !Cond.empty()) {
588 if (&*MBBI != TBB)
591 else if (TBB != *MBB->succ_begin())
597 } else if (!matchPair(MBB->succ_begin(), TBB, MBBI)) {
611 } else if (TBB && FBB)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
