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      1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 
     10 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H
     11 #define CLANG_CODEGEN_CGRECORDLAYOUT_H
     12 
     13 #include "clang/AST/CharUnits.h"
     14 #include "clang/AST/Decl.h"
     15 #include "clang/Basic/LLVM.h"
     16 #include "llvm/ADT/DenseMap.h"
     17 #include "llvm/DerivedTypes.h"
     18 
     19 namespace llvm {
     20   class StructType;
     21 }
     22 
     23 namespace clang {
     24 namespace CodeGen {
     25 
     26 /// \brief Helper object for describing how to generate the code for access to a
     27 /// bit-field.
     28 ///
     29 /// This structure is intended to describe the "policy" of how the bit-field
     30 /// should be accessed, which may be target, language, or ABI dependent.
     31 class CGBitFieldInfo {
     32 public:
     33   /// Descriptor for a single component of a bit-field access. The entire
     34   /// bit-field is constituted of a bitwise OR of all of the individual
     35   /// components.
     36   ///
     37   /// Each component describes an accessed value, which is how the component
     38   /// should be transferred to/from memory, and a target placement, which is how
     39   /// that component fits into the constituted bit-field. The pseudo-IR for a
     40   /// load is:
     41   ///
     42   ///   %0 = gep %base, 0, FieldIndex
     43   ///   %1 = gep (i8*) %0, FieldByteOffset
     44   ///   %2 = (i(AccessWidth) *) %1
     45   ///   %3 = load %2, align AccessAlignment
     46   ///   %4 = shr %3, FieldBitStart
     47   ///
     48   /// and the composed bit-field is formed as the boolean OR of all accesses,
     49   /// masked to TargetBitWidth bits and shifted to TargetBitOffset.
     50   struct AccessInfo {
     51     /// Offset of the field to load in the LLVM structure, if any.
     52     unsigned FieldIndex;
     53 
     54     /// Byte offset from the field address, if any. This should generally be
     55     /// unused as the cleanest IR comes from having a well-constructed LLVM type
     56     /// with proper GEP instructions, but sometimes its use is required, for
     57     /// example if an access is intended to straddle an LLVM field boundary.
     58     CharUnits FieldByteOffset;
     59 
     60     /// Bit offset in the accessed value to use. The width is implied by \see
     61     /// TargetBitWidth.
     62     unsigned FieldBitStart;
     63 
     64     /// Bit width of the memory access to perform.
     65     unsigned AccessWidth;
     66 
     67     /// The alignment of the memory access, assuming the parent is aligned.
     68     CharUnits AccessAlignment;
     69 
     70     /// Offset for the target value.
     71     unsigned TargetBitOffset;
     72 
     73     /// Number of bits in the access that are destined for the bit-field.
     74     unsigned TargetBitWidth;
     75   };
     76 
     77 private:
     78   /// The components to use to access the bit-field. We may need up to three
     79   /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte
     80   /// accesses).
     81   //
     82   // FIXME: De-hardcode this, just allocate following the struct.
     83   AccessInfo Components[3];
     84 
     85   /// The total size of the bit-field, in bits.
     86   unsigned Size;
     87 
     88   /// The number of access components to use.
     89   unsigned NumComponents;
     90 
     91   /// Whether the bit-field is signed.
     92   bool IsSigned : 1;
     93 
     94 public:
     95   CGBitFieldInfo(unsigned Size, unsigned NumComponents, AccessInfo *_Components,
     96                  bool IsSigned) : Size(Size), NumComponents(NumComponents),
     97                                   IsSigned(IsSigned) {
     98     assert(NumComponents <= 3 && "invalid number of components!");
     99     for (unsigned i = 0; i != NumComponents; ++i)
    100       Components[i] = _Components[i];
    101 
    102     // Check some invariants.
    103     unsigned AccessedSize = 0;
    104     for (unsigned i = 0, e = getNumComponents(); i != e; ++i) {
    105       const AccessInfo &AI = getComponent(i);
    106       AccessedSize += AI.TargetBitWidth;
    107 
    108       // We shouldn't try to load 0 bits.
    109       assert(AI.TargetBitWidth > 0);
    110 
    111       // We can't load more bits than we accessed.
    112       assert(AI.FieldBitStart + AI.TargetBitWidth <= AI.AccessWidth);
    113 
    114       // We shouldn't put any bits outside the result size.
    115       assert(AI.TargetBitWidth + AI.TargetBitOffset <= Size);
    116     }
    117 
    118     // Check that the total number of target bits matches the total bit-field
    119     // size.
    120     assert(AccessedSize == Size && "Total size does not match accessed size!");
    121   }
    122 
    123 public:
    124   /// \brief Check whether this bit-field access is (i.e., should be sign
    125   /// extended on loads).
    126   bool isSigned() const { return IsSigned; }
    127 
    128   /// \brief Get the size of the bit-field, in bits.
    129   unsigned getSize() const { return Size; }
    130 
    131   /// @name Component Access
    132   /// @{
    133 
    134   unsigned getNumComponents() const { return NumComponents; }
    135 
    136   const AccessInfo &getComponent(unsigned Index) const {
    137     assert(Index < getNumComponents() && "Invalid access!");
    138     return Components[Index];
    139   }
    140 
    141   /// @}
    142 
    143   void print(raw_ostream &OS) const;
    144   void dump() const;
    145 
    146   /// \brief Given a bit-field decl, build an appropriate helper object for
    147   /// accessing that field (which is expected to have the given offset and
    148   /// size).
    149   static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD,
    150                                  uint64_t FieldOffset, uint64_t FieldSize);
    151 
    152   /// \brief Given a bit-field decl, build an appropriate helper object for
    153   /// accessing that field (which is expected to have the given offset and
    154   /// size). The field decl should be known to be contained within a type of at
    155   /// least the given size and with the given alignment.
    156   static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD,
    157                                  uint64_t FieldOffset, uint64_t FieldSize,
    158                                  uint64_t ContainingTypeSizeInBits,
    159                                  unsigned ContainingTypeAlign);
    160 };
    161 
    162 /// CGRecordLayout - This class handles struct and union layout info while
    163 /// lowering AST types to LLVM types.
    164 ///
    165 /// These layout objects are only created on demand as IR generation requires.
    166 class CGRecordLayout {
    167   friend class CodeGenTypes;
    168 
    169   CGRecordLayout(const CGRecordLayout&); // DO NOT IMPLEMENT
    170   void operator=(const CGRecordLayout&); // DO NOT IMPLEMENT
    171 
    172 private:
    173   /// The LLVM type corresponding to this record layout; used when
    174   /// laying it out as a complete object.
    175   llvm::StructType *CompleteObjectType;
    176 
    177   /// The LLVM type for the non-virtual part of this record layout;
    178   /// used when laying it out as a base subobject.
    179   llvm::StructType *BaseSubobjectType;
    180 
    181   /// Map from (non-bit-field) struct field to the corresponding llvm struct
    182   /// type field no. This info is populated by record builder.
    183   llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
    184 
    185   /// Map from (bit-field) struct field to the corresponding llvm struct type
    186   /// field no. This info is populated by record builder.
    187   llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
    188 
    189   // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
    190   // map for both virtual and non virtual bases.
    191   llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
    192 
    193   /// Map from virtual bases to their field index in the complete object.
    194   llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
    195 
    196   /// False if any direct or indirect subobject of this class, when
    197   /// considered as a complete object, requires a non-zero bitpattern
    198   /// when zero-initialized.
    199   bool IsZeroInitializable : 1;
    200 
    201   /// False if any direct or indirect subobject of this class, when
    202   /// considered as a base subobject, requires a non-zero bitpattern
    203   /// when zero-initialized.
    204   bool IsZeroInitializableAsBase : 1;
    205 
    206 public:
    207   CGRecordLayout(llvm::StructType *CompleteObjectType,
    208                  llvm::StructType *BaseSubobjectType,
    209                  bool IsZeroInitializable,
    210                  bool IsZeroInitializableAsBase)
    211     : CompleteObjectType(CompleteObjectType),
    212       BaseSubobjectType(BaseSubobjectType),
    213       IsZeroInitializable(IsZeroInitializable),
    214       IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
    215 
    216   /// \brief Return the "complete object" LLVM type associated with
    217   /// this record.
    218   llvm::StructType *getLLVMType() const {
    219     return CompleteObjectType;
    220   }
    221 
    222   /// \brief Return the "base subobject" LLVM type associated with
    223   /// this record.
    224   llvm::StructType *getBaseSubobjectLLVMType() const {
    225     return BaseSubobjectType;
    226   }
    227 
    228   /// \brief Check whether this struct can be C++ zero-initialized
    229   /// with a zeroinitializer.
    230   bool isZeroInitializable() const {
    231     return IsZeroInitializable;
    232   }
    233 
    234   /// \brief Check whether this struct can be C++ zero-initialized
    235   /// with a zeroinitializer when considered as a base subobject.
    236   bool isZeroInitializableAsBase() const {
    237     return IsZeroInitializableAsBase;
    238   }
    239 
    240   /// \brief Return llvm::StructType element number that corresponds to the
    241   /// field FD.
    242   unsigned getLLVMFieldNo(const FieldDecl *FD) const {
    243     assert(!FD->isBitField() && "Invalid call for bit-field decl!");
    244     assert(FieldInfo.count(FD) && "Invalid field for record!");
    245     return FieldInfo.lookup(FD);
    246   }
    247 
    248   unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
    249     assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
    250     return NonVirtualBases.lookup(RD);
    251   }
    252 
    253   /// \brief Return the LLVM field index corresponding to the given
    254   /// virtual base.  Only valid when operating on the complete object.
    255   unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
    256     assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
    257     return CompleteObjectVirtualBases.lookup(base);
    258   }
    259 
    260   /// \brief Return the BitFieldInfo that corresponds to the field FD.
    261   const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
    262     assert(FD->isBitField() && "Invalid call for non bit-field decl!");
    263     llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
    264       it = BitFields.find(FD);
    265     assert(it != BitFields.end() && "Unable to find bitfield info");
    266     return it->second;
    267   }
    268 
    269   void print(raw_ostream &OS) const;
    270   void dump() const;
    271 };
    272 
    273 }  // end namespace CodeGen
    274 }  // end namespace clang
    275 
    276 #endif
    277