| /external/llvm/lib/CodeGen/ |
| LiveIntervalUnion.cpp | 151 LiveInterval *VReg = LiveUnionI.value();
152 if (VReg != RecentReg && !isSeenInterference(VReg)) {
153 RecentReg = VReg;
154 InterferingVRegs.push_back(VReg);
|
| LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
38 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
40 LiveInterval &LI = LIS.getOrCreateInterval(VReg);
|
| MachineFunction.cpp | 409 unsigned VReg = MRI.getLiveInVirtReg(PReg);
410 if (VReg) {
411 assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!");
412 return VReg;
414 VReg = MRI.createVirtualRegister(RC);
415 MRI.addLiveIn(PReg, VReg);
416 return VReg;
|
| TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i];
232 SSAUpdate.Initialize(VReg);
236 MachineInstr *DefMI = MRI->getVRegDef(VReg);
240 SSAUpdate.AddAvailableValue(DefBB, VReg);
245 SSAUpdateVals.find(VReg);
253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 98 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
99 // the CopyToReg'd destination register instead of creating a new vreg.
215 // is a vreg in the same register class, use the CopyToReg'd destination
216 // register instead of creating a new vreg.
271 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
274 if (!VReg) {
276 VReg = MRI->createVirtualRegister(RC);
279 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
280 return VReg;
302 unsigned VReg = getVR(Op, VRBaseMap)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 848 unsigned VReg =
850 RegInfo.addLiveIn(VA.getLocReg(), VReg);
851 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
853 unsigned VReg =
855 RegInfo.addLiveIn(VA.getLocReg(), VReg);
856 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 338 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
339 RegInfo.addLiveIn(VA.getLocReg(), VReg);
340 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 211 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
212 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
213 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
323 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
324 MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
325 SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 638 unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass);
649 the_chain = DAG.getCopyToReg(the_chain, dl, VReg, basePtr, Flag);
650 basePtr = DAG.getCopyFromReg(the_chain, dl, VReg, PtrVT);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 829 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC);
830 MF.getRegInfo().addLiveIn(PReg, VReg);
831 return VReg;
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
