| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 655 bool isTailCall = (RetOpcode == ARM::TCRETURNdi ||
671 if (Reg == ARM::LR && !isTailCall && !isVarArg && STI.hasV5TOps()) {
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 382 bool &isTailCall = CLI.IsTailCall;
417 if(isTailCall) {
420 isTailCall = IsEligibleForTailCallOptimization(Callee, CallConv,
427 isTailCall = false;
431 if (isTailCall) {
505 if (!isTailCall)
514 if (!isTailCall) {
523 if (isTailCall) {
574 if (isTailCall)
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 682 /// TODO: isVarArg, isTailCall.
693 bool &isTailCall = CLI.IsTailCall;
698 isTailCall = false;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 278 bool &isTailCall = CLI.IsTailCall;
283 isTailCall = false;
290 return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall,
442 bool isTailCall,
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 451 bool &isTailCall = CLI.IsTailCall;
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 357 bool &isTailCall = CLI.IsTailCall;
362 isTailCall = false;
[all...] |
| /external/llvm/include/llvm/ |
| Instructions.h | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 489 false, false, 0, CallingConv::C, /*isTailCall=*/false,
552 false, false, 0, CallingConv::C, /*isTailCall=*/false,
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 83 /*isTailCall=*/false,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
