1 /* 2 Copyright (C) 1996-1997 Id Software, Inc. 3 4 This program is free software; you can redistribute it and/or 5 modify it under the terms of the GNU General Public License 6 as published by the Free Software Foundation; either version 2 7 of the License, or (at your option) any later version. 8 9 This program is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 12 13 See the GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19 */ 20 // 21 // vgamodes.h: VGA mode set tables 22 // 23 24 #include "vregset.h" 25 26 int VGA_InitMode (viddef_t *vid, vmode_t *pcurrentmode); 27 void VGA_SwapBuffers (viddef_t *vid, vmode_t *pcurrentmode, vrect_t *rects); 28 void VGA_SetPalette (viddef_t *vid, vmode_t *pcurrentmode, 29 unsigned char *pal); 30 31 /////////////////////////////////////////////////////////////////////////// 32 // the following base mode descriptors plus extra data together provide all 33 // the data needed to do VGA mode sets 34 /////////////////////////////////////////////////////////////////////////// 35 36 typedef struct { 37 int vidbuffer; 38 int *pregset; 39 } vextra_t; 40 41 int vrsnull[] = { 42 VRS_END, 43 }; 44 45 int vrs320x200x256planar[] = { 46 // 47 // switch to linear, non-chain4 mode 48 // 49 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 50 VRS_BYTE_OUT, SC_DATA, 1, 51 52 VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE, 53 VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04, 54 VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE, 55 VRS_BYTE_RMW, GC_DATA, ~0x13, 0x00, 56 VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS, 57 VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00, 58 59 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 60 VRS_BYTE_OUT, SC_DATA, 3, 61 62 // 63 // change the CRTC from doubleword to byte mode 64 // 65 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 66 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 67 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 68 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 69 70 VRS_END, 71 }; 72 73 int vrs360x200x256planar[] = { 74 // 75 // switch to linear, non-chain4 mode 76 // 77 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 78 VRS_BYTE_OUT, SC_DATA, 1, 79 80 VRS_WORD_OUT, SC_INDEX, 0x0604, 81 VRS_BYTE_OUT, MISC_OUTPUT, 0x67, 82 83 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 84 VRS_BYTE_OUT, SC_DATA, 3, 85 86 // 87 // unprotect CRTC0 through CRTC0 88 // 89 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 90 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 91 92 // 93 // change the CRTC from doubleword to byte mode 94 // 95 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 96 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 97 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 98 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 99 100 // 101 // set up the CRT Controller 102 // 103 VRS_WORD_OUT, CRTC_INDEX, 0x6B00, 104 VRS_WORD_OUT, CRTC_INDEX, 0x5901, 105 VRS_WORD_OUT, CRTC_INDEX, 0x5A02, 106 VRS_WORD_OUT, CRTC_INDEX, 0x8E03, 107 VRS_WORD_OUT, CRTC_INDEX, 0x5E04, 108 VRS_WORD_OUT, CRTC_INDEX, 0x8A05, 109 VRS_WORD_OUT, CRTC_INDEX, 0x3013, 110 111 VRS_END, 112 }; 113 114 int vrs320x240x256planar[] = { 115 // 116 // switch to linear, non-chain4 mode 117 // 118 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 119 VRS_BYTE_OUT, SC_DATA, 1, 120 121 VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE, 122 VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04, 123 VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE, 124 VRS_BYTE_RMW, GC_DATA, ~0x13, 0x00, 125 VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS, 126 VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00, 127 128 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 129 VRS_BYTE_OUT, SC_DATA, 3, 130 131 // 132 // unprotect CRTC0 through CRTC0 133 // 134 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 135 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 136 137 // 138 // set up the CRT Controller 139 // 140 VRS_WORD_OUT, CRTC_INDEX, 0x0D06, 141 VRS_WORD_OUT, CRTC_INDEX, 0x3E07, 142 VRS_WORD_OUT, CRTC_INDEX, 0x4109, 143 VRS_WORD_OUT, CRTC_INDEX, 0xEA10, 144 VRS_WORD_OUT, CRTC_INDEX, 0xAC11, 145 VRS_WORD_OUT, CRTC_INDEX, 0xDF12, 146 VRS_WORD_OUT, CRTC_INDEX, 0x0014, 147 VRS_WORD_OUT, CRTC_INDEX, 0xE715, 148 VRS_WORD_OUT, CRTC_INDEX, 0x0616, 149 VRS_WORD_OUT, CRTC_INDEX, 0xE317, 150 151 VRS_END, 152 }; 153 154 int vrs360x240x256planar[] = { 155 // 156 // switch to linear, non-chain4 mode 157 // 158 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 159 VRS_BYTE_OUT, SC_DATA, 1, 160 161 VRS_WORD_OUT, SC_INDEX, 0x0604, 162 VRS_BYTE_OUT, MISC_OUTPUT, 0xE7, 163 164 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 165 VRS_BYTE_OUT, SC_DATA, 3, 166 167 // 168 // unprotect CRTC0 through CRTC0 169 // 170 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 171 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 172 173 // 174 // set up the CRT Controller 175 // 176 VRS_WORD_OUT, CRTC_INDEX, 0x6B00, 177 VRS_WORD_OUT, CRTC_INDEX, 0x5901, 178 VRS_WORD_OUT, CRTC_INDEX, 0x5A02, 179 VRS_WORD_OUT, CRTC_INDEX, 0x8E03, 180 VRS_WORD_OUT, CRTC_INDEX, 0x5E04, 181 VRS_WORD_OUT, CRTC_INDEX, 0x8A05, 182 VRS_WORD_OUT, CRTC_INDEX, 0x0D06, 183 VRS_WORD_OUT, CRTC_INDEX, 0x3E07, 184 VRS_WORD_OUT, CRTC_INDEX, 0x4109, 185 VRS_WORD_OUT, CRTC_INDEX, 0xEA10, 186 VRS_WORD_OUT, CRTC_INDEX, 0xAC11, 187 VRS_WORD_OUT, CRTC_INDEX, 0xDF12, 188 VRS_WORD_OUT, CRTC_INDEX, 0x3013, 189 VRS_WORD_OUT, CRTC_INDEX, 0x0014, 190 VRS_WORD_OUT, CRTC_INDEX, 0xE715, 191 VRS_WORD_OUT, CRTC_INDEX, 0x0616, 192 VRS_WORD_OUT, CRTC_INDEX, 0xE317, 193 194 VRS_END, 195 }; 196 197 int vrs320x350x256planar[] = { 198 // 199 // switch to linear, non-chain4 mode 200 // 201 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 202 VRS_BYTE_OUT, SC_DATA, 1, 203 204 VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE, 205 VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04, 206 VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE, 207 VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00, 208 VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS, 209 VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00, 210 VRS_BYTE_OUT, MISC_OUTPUT, 0xA3, // 350-scan-line scan rate 211 212 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 213 VRS_BYTE_OUT, SC_DATA, 3, 214 215 // 216 // unprotect CRTC0 through CRTC0 217 // 218 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 219 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 220 221 // 222 // stop scanning each line twice 223 // 224 VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE, 225 VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00, 226 227 // 228 // change the CRTC from doubleword to byte mode 229 // 230 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 231 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 232 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 233 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 234 235 // 236 // set the vertical counts for 350-scan-line mode 237 // 238 VRS_WORD_OUT, CRTC_INDEX, 0xBF06, 239 VRS_WORD_OUT, CRTC_INDEX, 0x1F07, 240 VRS_WORD_OUT, CRTC_INDEX, 0x8310, 241 VRS_WORD_OUT, CRTC_INDEX, 0x8511, 242 VRS_WORD_OUT, CRTC_INDEX, 0x5D12, 243 VRS_WORD_OUT, CRTC_INDEX, 0x6315, 244 VRS_WORD_OUT, CRTC_INDEX, 0xBA16, 245 246 VRS_END, 247 }; 248 249 int vrs360x350x256planar[] = { 250 // 251 // switch to linear, non-chain4 mode 252 // 253 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 254 VRS_BYTE_OUT, SC_DATA, 1, 255 256 VRS_WORD_OUT, SC_INDEX, 0x0604, 257 VRS_BYTE_OUT, MISC_OUTPUT, 0xA7, // 350-scan-line scan rate 258 259 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 260 VRS_BYTE_OUT, SC_DATA, 3, 261 262 // 263 // unprotect CRTC0 through CRTC0 264 // 265 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 266 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 267 268 // 269 // stop scanning each line twice 270 // 271 VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE, 272 VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00, 273 274 // 275 // change the CRTC from doubleword to byte mode 276 // 277 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 278 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 279 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 280 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 281 282 // 283 // set the vertical counts for 350-scan-line mode and 360 pixels across 284 // 285 VRS_WORD_OUT, CRTC_INDEX, 0x6B00, 286 VRS_WORD_OUT, CRTC_INDEX, 0x5901, 287 VRS_WORD_OUT, CRTC_INDEX, 0x5A02, 288 VRS_WORD_OUT, CRTC_INDEX, 0x8E03, 289 VRS_WORD_OUT, CRTC_INDEX, 0x5E04, 290 VRS_WORD_OUT, CRTC_INDEX, 0x8A05, 291 VRS_WORD_OUT, CRTC_INDEX, 0xBF06, 292 VRS_WORD_OUT, CRTC_INDEX, 0x1F07, 293 VRS_WORD_OUT, CRTC_INDEX, 0x8310, 294 VRS_WORD_OUT, CRTC_INDEX, 0x8511, 295 VRS_WORD_OUT, CRTC_INDEX, 0x5D12, 296 VRS_WORD_OUT, CRTC_INDEX, 0x3013, 297 VRS_WORD_OUT, CRTC_INDEX, 0x6315, 298 VRS_WORD_OUT, CRTC_INDEX, 0xBA16, 299 300 VRS_END, 301 }; 302 303 int vrs320x400x256planar[] = { 304 // 305 // switch to linear, non-chain4 mode 306 // 307 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 308 VRS_BYTE_OUT, SC_DATA, 1, 309 310 311 VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE, 312 VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04, 313 VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE, 314 VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00, 315 VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS, 316 VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00, 317 318 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 319 VRS_BYTE_OUT, SC_DATA, 3, 320 321 // 322 // stop scanning each line twice 323 // 324 VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE, 325 VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00, 326 327 // 328 // change the CRTC from doubleword to byte mode 329 // 330 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 331 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 332 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 333 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 334 335 VRS_END, 336 }; 337 338 int vrs360x400x256planar[] = { 339 // 340 // switch to linear, non-chain4 mode 341 // 342 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 343 VRS_BYTE_OUT, SC_DATA, 1, 344 345 VRS_WORD_OUT, SC_INDEX, 0x0604, 346 VRS_BYTE_OUT, MISC_OUTPUT, 0x67, 347 348 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 349 VRS_BYTE_OUT, SC_DATA, 3, 350 351 // 352 // unprotect CRTC0 through CRTC0 353 // 354 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 355 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 356 357 // 358 // stop scanning each line twice 359 // 360 VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE, 361 VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00, 362 363 // 364 // change the CRTC from doubleword to byte mode 365 // 366 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 367 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 368 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 369 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 370 371 // 372 // set up the CRT Controller 373 // 374 VRS_WORD_OUT, CRTC_INDEX, 0x6B00, 375 VRS_WORD_OUT, CRTC_INDEX, 0x5901, 376 VRS_WORD_OUT, CRTC_INDEX, 0x5A02, 377 VRS_WORD_OUT, CRTC_INDEX, 0x8E03, 378 VRS_WORD_OUT, CRTC_INDEX, 0x5E04, 379 VRS_WORD_OUT, CRTC_INDEX, 0x8A05, 380 VRS_WORD_OUT, CRTC_INDEX, 0x3013, 381 382 VRS_END, 383 }; 384 385 int vrs320x480x256planar[] = { 386 // 387 // switch to linear, non-chain4 mode 388 // 389 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 390 VRS_BYTE_OUT, SC_DATA, 1, 391 392 VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE, 393 VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04, 394 VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE, 395 VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00, 396 VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS, 397 VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00, 398 399 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 400 VRS_BYTE_OUT, SC_DATA, 3, 401 402 // 403 // unprotect CRTC0 through CRTC0 404 // 405 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 406 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 407 408 // 409 // stop scanning each line twice 410 // 411 VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE, 412 VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00, 413 414 // 415 // change the CRTC from doubleword to byte mode 416 // 417 VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE, 418 VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00, 419 VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL, 420 VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40, 421 422 // 423 // set up the CRT Controller 424 // 425 VRS_WORD_OUT, CRTC_INDEX, 0x0D06, 426 VRS_WORD_OUT, CRTC_INDEX, 0x3E07, 427 VRS_WORD_OUT, CRTC_INDEX, 0xEA10, 428 VRS_WORD_OUT, CRTC_INDEX, 0xAC11, 429 VRS_WORD_OUT, CRTC_INDEX, 0xDF12, 430 VRS_WORD_OUT, CRTC_INDEX, 0xE715, 431 VRS_WORD_OUT, CRTC_INDEX, 0x0616, 432 433 VRS_END, 434 }; 435 436 int vrs360x480x256planar[] = { 437 // 438 // switch to linear, non-chain4 mode 439 // 440 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 441 VRS_BYTE_OUT, SC_DATA, 1, 442 443 VRS_WORD_OUT, SC_INDEX, 0x0604, 444 VRS_BYTE_OUT, MISC_OUTPUT, 0xE7, 445 446 VRS_BYTE_OUT, SC_INDEX, SYNC_RESET, 447 VRS_BYTE_OUT, SC_DATA, 3, 448 449 // 450 // unprotect CRTC0 through CRTC0 451 // 452 VRS_BYTE_OUT, CRTC_INDEX, 0x11, 453 VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00, 454 455 // 456 // set up the CRT Controller 457 // 458 VRS_WORD_OUT, CRTC_INDEX, 0x6B00, 459 VRS_WORD_OUT, CRTC_INDEX, 0x5901, 460 VRS_WORD_OUT, CRTC_INDEX, 0x5A02, 461 VRS_WORD_OUT, CRTC_INDEX, 0x8E03, 462 VRS_WORD_OUT, CRTC_INDEX, 0x5E04, 463 VRS_WORD_OUT, CRTC_INDEX, 0x8A05, 464 VRS_WORD_OUT, CRTC_INDEX, 0x0D06, 465 VRS_WORD_OUT, CRTC_INDEX, 0x3E07, 466 VRS_WORD_OUT, CRTC_INDEX, 0x4009, 467 VRS_WORD_OUT, CRTC_INDEX, 0xEA10, 468 VRS_WORD_OUT, CRTC_INDEX, 0xAC11, 469 VRS_WORD_OUT, CRTC_INDEX, 0xDF12, 470 VRS_WORD_OUT, CRTC_INDEX, 0x3013, 471 VRS_WORD_OUT, CRTC_INDEX, 0x0014, 472 VRS_WORD_OUT, CRTC_INDEX, 0xE715, 473 VRS_WORD_OUT, CRTC_INDEX, 0x0616, 474 VRS_WORD_OUT, CRTC_INDEX, 0xE317, 475 476 VRS_END, 477 }; 478 479 // 480 // extra VGA-specific data for vgavidmodes 481 // 482 vextra_t extra320x200x256linear = { 483 1, vrsnull 484 }; 485 vextra_t extra320x200x256planar = { 486 1, vrs320x200x256planar 487 }; 488 vextra_t extra360x200x256planar = { 489 1, vrs360x200x256planar 490 }; 491 vextra_t extra320x240x256planar = { 492 1, vrs320x240x256planar 493 }; 494 vextra_t extra360x240x256planar = { 495 1, vrs360x240x256planar 496 }; 497 vextra_t extra320x350x256planar = { 498 1, vrs320x350x256planar 499 }; 500 vextra_t extra360x350x256planar = { 501 1, vrs360x350x256planar 502 }; 503 vextra_t extra320x400x256planar = { 504 1, vrs320x400x256planar 505 }; 506 vextra_t extra360x400x256planar = { 507 1, vrs360x400x256planar 508 }; 509 vextra_t extra320x480x256planar = { 510 1, vrs320x480x256planar 511 }; 512 vextra_t extra360x480x256planar = { 513 1, vrs360x480x256planar 514 }; 515 516 // 517 // base mode descriptors, in ascending order of number of pixels 518 // 519 520 vmode_t vgavidmodes[] = { 521 { 522 NULL, 523 "320x200", " ***** standard VGA modes ***** ", 524 320, 200, (200.0/320.0)*(320.0/240.0), 320, 0, 1, &extra320x200x256linear, 525 VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette, 526 VGA_BeginDirectRect, VGA_EndDirectRect 527 }, 528 { 529 NULL, 530 "320x200", " ***** Mode X-style modes ***** ", 531 320, 200, (200.0/320.0)*(320.0/240.0), 320, 1, 1, &extra320x200x256planar, 532 VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette, 533 VGA_BeginDirectRect, VGA_EndDirectRect 534 }, 535 { 536 NULL, 537 "360x200", NULL, 360, 200, (200.0/360.0)*(320.0/240.0), 538 384, 1, 1, &extra360x200x256planar, VGA_InitMode, 539 VGA_SwapBuffers, 540 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 541 }, 542 { 543 NULL, 544 "320x240", NULL, 320, 240, (240.0/320.0)*(320.0/240.0), 545 320, 1, 1, &extra320x240x256planar, VGA_InitMode, 546 VGA_SwapBuffers, 547 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 548 }, 549 { 550 NULL, 551 "360x240", NULL, 360, 240, (240.0/360.0)*(320.0/240.0), 552 384, 1, 1, &extra360x240x256planar, 553 VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette, 554 VGA_BeginDirectRect, VGA_EndDirectRect 555 }, 556 { 557 NULL, 558 "320x350", NULL, 320, 350, (350.0/320.0)*(320.0/240.0), 559 320, 1, 1, &extra320x350x256planar, VGA_InitMode, 560 VGA_SwapBuffers, 561 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 562 }, 563 { 564 NULL, 565 "360x350", NULL, 360, 350, (350.0/360.0)*(320.0/240.0), 566 384, 1, 1, &extra360x350x256planar, VGA_InitMode, 567 VGA_SwapBuffers, 568 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 569 }, 570 { 571 NULL, 572 "320x400", NULL, 320, 400, (400.0/320.0)*(320.0/240.0), 320, 573 1, 1, &extra320x400x256planar, VGA_InitMode, 574 VGA_SwapBuffers, 575 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 576 }, 577 { 578 NULL, 579 "360x400", NULL, 360, 400, (400.0/360.0)*(320.0/240.0), 580 384, 1, 1, &extra360x400x256planar, VGA_InitMode, 581 VGA_SwapBuffers, 582 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 583 }, 584 { 585 NULL, 586 "320x480", NULL, 320, 480, (480.0/320.0)*(320.0/240.0), 587 320, 1, 1, &extra320x480x256planar, VGA_InitMode, 588 VGA_SwapBuffers, 589 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 590 }, 591 { 592 NULL, 593 "360x480", NULL, 360, 480, (480.0/360.0)*(320.0/240.0), 594 384, 1, 1, &extra360x480x256planar, VGA_InitMode, 595 VGA_SwapBuffers, 596 VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect 597 }, 598 }; 599 600
