1 /* 2 * rate.c 3 * 4 * Copyright(c) 1998 - 2010 Texas Instruments. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name Texas Instruments nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 35 /** \file rate.c 36 * \brief Rate conversion 37 * 38 * \see rate.h 39 */ 40 #define __FILE_ID__ FILE_ID_131 41 #include "tidef.h" 42 #include "rate.h" 43 44 ERate rate_NetToDrv (TI_UINT32 rate) 45 { 46 switch (rate) 47 { 48 case NET_RATE_1M: 49 case NET_RATE_1M_BASIC: 50 return DRV_RATE_1M; 51 52 case NET_RATE_2M: 53 case NET_RATE_2M_BASIC: 54 return DRV_RATE_2M; 55 56 case NET_RATE_5_5M: 57 case NET_RATE_5_5M_BASIC: 58 return DRV_RATE_5_5M; 59 60 case NET_RATE_11M: 61 case NET_RATE_11M_BASIC: 62 return DRV_RATE_11M; 63 64 case NET_RATE_22M: 65 case NET_RATE_22M_BASIC: 66 return DRV_RATE_22M; 67 68 case NET_RATE_6M: 69 case NET_RATE_6M_BASIC: 70 return DRV_RATE_6M; 71 72 case NET_RATE_9M: 73 case NET_RATE_9M_BASIC: 74 return DRV_RATE_9M; 75 76 case NET_RATE_12M: 77 case NET_RATE_12M_BASIC: 78 return DRV_RATE_12M; 79 80 case NET_RATE_18M: 81 case NET_RATE_18M_BASIC: 82 return DRV_RATE_18M; 83 84 case NET_RATE_24M: 85 case NET_RATE_24M_BASIC: 86 return DRV_RATE_24M; 87 88 case NET_RATE_36M: 89 case NET_RATE_36M_BASIC: 90 return DRV_RATE_36M; 91 92 case NET_RATE_48M: 93 case NET_RATE_48M_BASIC: 94 return DRV_RATE_48M; 95 96 case NET_RATE_54M: 97 case NET_RATE_54M_BASIC: 98 return DRV_RATE_54M; 99 100 case NET_RATE_MCS0: 101 case NET_RATE_MCS0_BASIC: 102 return DRV_RATE_MCS_0; 103 104 case NET_RATE_MCS1: 105 case NET_RATE_MCS1_BASIC: 106 return DRV_RATE_MCS_1; 107 108 case NET_RATE_MCS2: 109 case NET_RATE_MCS2_BASIC: 110 return DRV_RATE_MCS_2; 111 112 case NET_RATE_MCS3: 113 case NET_RATE_MCS3_BASIC: 114 return DRV_RATE_MCS_3; 115 116 case NET_RATE_MCS4: 117 case NET_RATE_MCS4_BASIC: 118 return DRV_RATE_MCS_4; 119 120 case NET_RATE_MCS5: 121 case NET_RATE_MCS5_BASIC: 122 return DRV_RATE_MCS_5; 123 124 case NET_RATE_MCS6: 125 case NET_RATE_MCS6_BASIC: 126 return DRV_RATE_MCS_6; 127 128 case NET_RATE_MCS7: 129 case NET_RATE_MCS7_BASIC: 130 return DRV_RATE_MCS_7; 131 132 default: 133 return DRV_RATE_INVALID; 134 } 135 } 136 137 /************************************************************************ 138 * hostToNetworkRate * 139 ************************************************************************ 140 DESCRIPTION: Translates a host rate (1, 2, 3, ....) to network rate (0x02, 0x82, 0x84, etc...) 141 142 INPUT: rate - Host rate 143 144 OUTPUT: 145 146 147 RETURN: Network rate if the input rate is valid, otherwise returns 0. 148 149 ************************************************************************/ 150 ENetRate rate_DrvToNet (ERate rate) 151 { 152 switch (rate) 153 { 154 case DRV_RATE_AUTO: 155 return NET_RATE_AUTO; 156 157 case DRV_RATE_1M: 158 return NET_RATE_1M; 159 160 case DRV_RATE_2M: 161 return NET_RATE_2M; 162 163 case DRV_RATE_5_5M: 164 return NET_RATE_5_5M; 165 166 case DRV_RATE_11M: 167 return NET_RATE_11M; 168 169 case DRV_RATE_22M: 170 return NET_RATE_22M; 171 172 case DRV_RATE_6M: 173 return NET_RATE_6M; 174 175 case DRV_RATE_9M: 176 return NET_RATE_9M; 177 178 case DRV_RATE_12M: 179 return NET_RATE_12M; 180 181 case DRV_RATE_18M: 182 return NET_RATE_18M; 183 184 case DRV_RATE_24M: 185 return NET_RATE_24M; 186 187 case DRV_RATE_36M: 188 return NET_RATE_36M; 189 190 case DRV_RATE_48M: 191 return NET_RATE_48M; 192 193 case DRV_RATE_54M: 194 return NET_RATE_54M; 195 196 case DRV_RATE_MCS_0: 197 return NET_RATE_MCS0; 198 199 case DRV_RATE_MCS_1: 200 return NET_RATE_MCS1; 201 202 case DRV_RATE_MCS_2: 203 return NET_RATE_MCS2; 204 205 case DRV_RATE_MCS_3: 206 return NET_RATE_MCS3; 207 208 case DRV_RATE_MCS_4: 209 return NET_RATE_MCS4; 210 211 case DRV_RATE_MCS_5: 212 return NET_RATE_MCS5; 213 214 case DRV_RATE_MCS_6: 215 return NET_RATE_MCS6; 216 217 case DRV_RATE_MCS_7: 218 return NET_RATE_MCS7; 219 220 default: 221 return NET_RATE_AUTO; 222 } 223 } 224 225 /*************************************************************************** 226 * getMaxActiveRatefromBitmap * 227 **************************************************************************** 228 * DESCRIPTION: 229 * 230 * INPUTS: hCtrlData - the object 231 * 232 * OUTPUT: 233 * 234 * RETURNS: 235 ***************************************************************************/ 236 ERate rate_GetMaxFromDrvBitmap (TI_UINT32 uRateBitMap) 237 { 238 if (uRateBitMap & DRV_RATE_MASK_MCS_7_OFDM) 239 { 240 return DRV_RATE_MCS_7; 241 } 242 243 if (uRateBitMap & DRV_RATE_MASK_MCS_6_OFDM) 244 { 245 return DRV_RATE_MCS_6; 246 } 247 248 if (uRateBitMap & DRV_RATE_MASK_MCS_5_OFDM) 249 { 250 return DRV_RATE_MCS_5; 251 } 252 253 if (uRateBitMap & DRV_RATE_MASK_MCS_4_OFDM) 254 { 255 return DRV_RATE_MCS_4; 256 } 257 258 if (uRateBitMap & DRV_RATE_MASK_MCS_3_OFDM) 259 { 260 return DRV_RATE_MCS_3; 261 } 262 263 if (uRateBitMap & DRV_RATE_MASK_MCS_2_OFDM) 264 { 265 return DRV_RATE_MCS_2; 266 } 267 268 if (uRateBitMap & DRV_RATE_MASK_MCS_1_OFDM) 269 { 270 return DRV_RATE_MCS_1; 271 } 272 273 if (uRateBitMap & DRV_RATE_MASK_MCS_0_OFDM) 274 { 275 return DRV_RATE_MCS_0; 276 } 277 278 if (uRateBitMap & DRV_RATE_MASK_54_OFDM) 279 { 280 return DRV_RATE_54M; 281 } 282 283 if (uRateBitMap & DRV_RATE_MASK_48_OFDM) 284 { 285 return DRV_RATE_48M; 286 } 287 288 if (uRateBitMap & DRV_RATE_MASK_36_OFDM) 289 { 290 return DRV_RATE_36M; 291 } 292 293 if (uRateBitMap & DRV_RATE_MASK_24_OFDM) 294 { 295 return DRV_RATE_24M; 296 } 297 298 if (uRateBitMap & DRV_RATE_MASK_22_PBCC) 299 { 300 return DRV_RATE_22M; 301 } 302 303 if (uRateBitMap & DRV_RATE_MASK_18_OFDM) 304 { 305 return DRV_RATE_18M; 306 } 307 308 if (uRateBitMap & DRV_RATE_MASK_12_OFDM) 309 { 310 return DRV_RATE_12M; 311 } 312 313 if (uRateBitMap & DRV_RATE_MASK_11_CCK) 314 { 315 return DRV_RATE_11M; 316 } 317 318 if (uRateBitMap & DRV_RATE_MASK_9_OFDM) 319 { 320 return DRV_RATE_9M; 321 } 322 323 if (uRateBitMap & DRV_RATE_MASK_6_OFDM) 324 { 325 return DRV_RATE_6M; 326 } 327 328 if (uRateBitMap & DRV_RATE_MASK_5_5_CCK) 329 { 330 return DRV_RATE_5_5M; 331 } 332 333 if (uRateBitMap & DRV_RATE_MASK_2_BARKER) 334 { 335 return DRV_RATE_2M; 336 } 337 338 if (uRateBitMap & DRV_RATE_MASK_1_BARKER) 339 { 340 return DRV_RATE_1M; 341 } 342 343 return DRV_RATE_INVALID; 344 } 345 346 /************************************************************************ 347 * validateNetworkRate * 348 ************************************************************************ 349 DESCRIPTION: Verify that the input nitwork rate is valid 350 351 INPUT: rate - input network rate 352 353 OUTPUT: 354 355 356 RETURN: TI_OK if valid, otherwise TI_NOK 357 358 ************************************************************************/ 359 static TI_STATUS rate_ValidateNet (ENetRate eRate) 360 { 361 switch (eRate) 362 { 363 case NET_RATE_1M: 364 case NET_RATE_1M_BASIC: 365 case NET_RATE_2M: 366 case NET_RATE_2M_BASIC: 367 case NET_RATE_5_5M: 368 case NET_RATE_5_5M_BASIC: 369 case NET_RATE_11M: 370 case NET_RATE_11M_BASIC: 371 case NET_RATE_22M: 372 case NET_RATE_22M_BASIC: 373 case NET_RATE_6M: 374 case NET_RATE_6M_BASIC: 375 case NET_RATE_9M: 376 case NET_RATE_9M_BASIC: 377 case NET_RATE_12M: 378 case NET_RATE_12M_BASIC: 379 case NET_RATE_18M: 380 case NET_RATE_18M_BASIC: 381 case NET_RATE_24M: 382 case NET_RATE_24M_BASIC: 383 case NET_RATE_36M: 384 case NET_RATE_36M_BASIC: 385 case NET_RATE_48M: 386 case NET_RATE_48M_BASIC: 387 case NET_RATE_54M: 388 case NET_RATE_54M_BASIC: 389 return TI_OK; 390 391 default: 392 return TI_NOK; 393 } 394 } 395 396 /************************************************************************ 397 * getMaxBasicRate * 398 ************************************************************************ 399 DESCRIPTION: Goes over an array of network rates and returns the max basic rate 400 401 INPUT: pRates - Rate array 402 403 OUTPUT: 404 405 406 RETURN: Max basic rate (in network units) 407 408 ************************************************************************/ 409 ENetRate rate_GetMaxBasicFromStr (TI_UINT8 *pRatesString, TI_UINT32 len, ENetRate eMaxRate) 410 { 411 TI_UINT32 i; 412 413 for (i = 0; i < len; i++) 414 { 415 if (NET_BASIC_RATE (pRatesString[i]) && rate_ValidateNet ((ENetRate)pRatesString[i]) == TI_OK) 416 { 417 eMaxRate = TI_MAX ((ENetRate)pRatesString[i], eMaxRate); 418 } 419 } 420 421 return eMaxRate; 422 } 423 424 /************************************************************************ 425 * getMaxActiveRate * 426 ************************************************************************ 427 DESCRIPTION: Goes over an array of network rates and returns the max active rate 428 429 INPUT: pRates - Rate array 430 431 OUTPUT: 432 433 434 RETURN: Max active rate (in network units) 435 436 ************************************************************************/ 437 ENetRate rate_GetMaxActiveFromStr (TI_UINT8 *pRatesString, TI_UINT32 len, ENetRate eMaxRate) 438 { 439 TI_UINT32 i; 440 441 for (i = 0; i < len; i++) 442 { 443 if (NET_ACTIVE_RATE (pRatesString[i]) && rate_ValidateNet ((ENetRate)pRatesString[i]) == TI_OK) 444 { 445 eMaxRate = TI_MAX ((ENetRate)pRatesString[i], eMaxRate); 446 } 447 } 448 449 return eMaxRate; 450 } 451 452 TI_UINT32 rate_DrvToNumber (ERate eRate) 453 { 454 switch (eRate) 455 { 456 case DRV_RATE_1M: 457 return 1; 458 459 case DRV_RATE_2M: 460 return 2; 461 462 case DRV_RATE_5_5M: 463 return 5; 464 465 case DRV_RATE_11M: 466 return 11; 467 468 case DRV_RATE_22M: 469 return 22; 470 471 case DRV_RATE_6M: 472 return 6; 473 474 case DRV_RATE_9M: 475 return 9; 476 477 case DRV_RATE_12M: 478 return 12; 479 480 case DRV_RATE_18M: 481 return 18; 482 483 case DRV_RATE_24M: 484 return 24; 485 486 case DRV_RATE_36M: 487 return 36; 488 489 case DRV_RATE_48M: 490 return 48; 491 492 case DRV_RATE_54M: 493 return 54; 494 495 case DRV_RATE_MCS_0: 496 return 6; 497 498 case DRV_RATE_MCS_1: 499 return 13; 500 501 case DRV_RATE_MCS_2: 502 return 19; 503 504 case DRV_RATE_MCS_3: 505 return 26; 506 507 case DRV_RATE_MCS_4: 508 return 39; 509 510 case DRV_RATE_MCS_5: 511 return 52; 512 513 case DRV_RATE_MCS_6: 514 return 58; 515 516 case DRV_RATE_MCS_7: 517 return 65; 518 519 default: 520 return 0; 521 } 522 } 523 524 /************************************************************************ 525 * bitMapToNetworkStringRates * 526 ************************************************************************ 527 DESCRIPTION: Converts bit map to the rates string 528 529 INPUT: suppRatesBitMap - bit map of supported rates 530 basicRatesBitMap - bit map of basic rates 531 532 OUTPUT: string - network format rates array, 533 len - rates array length 534 firstOFDMrateLoc - the index of first OFDM rate in the rates array. 535 536 537 RETURN: None 538 539 ************************************************************************/ 540 TI_STATUS rate_DrvBitmapToNetStr (TI_UINT32 uSuppRatesBitMap, 541 TI_UINT32 uBasicRatesBitMap, 542 TI_UINT8 *string, 543 TI_UINT32 *len, 544 TI_UINT32 *pFirstOfdmRate) 545 { 546 TI_UINT32 i = 0; 547 548 if (uSuppRatesBitMap & DRV_RATE_MASK_1_BARKER) 549 { 550 if (uBasicRatesBitMap & DRV_RATE_MASK_1_BARKER) 551 { 552 string[i++] = NET_RATE_1M_BASIC; 553 } 554 else 555 { 556 string[i++] = NET_RATE_1M; 557 } 558 } 559 560 if (uSuppRatesBitMap & DRV_RATE_MASK_2_BARKER) 561 { 562 if (uBasicRatesBitMap & DRV_RATE_MASK_2_BARKER) 563 { 564 string[i++] = NET_RATE_2M_BASIC; 565 } 566 else 567 { 568 string[i++] = NET_RATE_2M; 569 } 570 } 571 572 if (uSuppRatesBitMap & DRV_RATE_MASK_5_5_CCK) 573 { 574 if (uBasicRatesBitMap & DRV_RATE_MASK_5_5_CCK) 575 { 576 string[i++] = NET_RATE_5_5M_BASIC; 577 } 578 else 579 { 580 string[i++] = NET_RATE_5_5M; 581 } 582 } 583 584 if (uSuppRatesBitMap & DRV_RATE_MASK_11_CCK) 585 { 586 if (uBasicRatesBitMap & DRV_RATE_MASK_11_CCK) 587 { 588 string[i++] = NET_RATE_11M_BASIC; 589 } 590 else 591 { 592 string[i++] = NET_RATE_11M; 593 } 594 } 595 596 if (uSuppRatesBitMap & DRV_RATE_MASK_22_PBCC) 597 { 598 if (uBasicRatesBitMap & DRV_RATE_MASK_22_PBCC) 599 { 600 string[i++] = NET_RATE_22M_BASIC; 601 } 602 else 603 { 604 string[i++] = NET_RATE_22M; 605 } 606 } 607 608 *pFirstOfdmRate = i; 609 610 if (uSuppRatesBitMap & DRV_RATE_MASK_6_OFDM) 611 { 612 if (uBasicRatesBitMap & DRV_RATE_MASK_6_OFDM) 613 { 614 string[i++] = NET_RATE_6M_BASIC; 615 } 616 else 617 { 618 string[i++] = NET_RATE_6M; 619 } 620 } 621 622 if (uSuppRatesBitMap & DRV_RATE_MASK_9_OFDM) 623 { 624 if (uBasicRatesBitMap & DRV_RATE_MASK_9_OFDM) 625 { 626 string[i++] = NET_RATE_9M_BASIC; 627 } 628 else 629 { 630 string[i++] = NET_RATE_9M; 631 } 632 } 633 634 if (uSuppRatesBitMap & DRV_RATE_MASK_12_OFDM) 635 { 636 if (uBasicRatesBitMap & DRV_RATE_MASK_12_OFDM) 637 { 638 string[i++] = NET_RATE_12M_BASIC; 639 } 640 else 641 { 642 string[i++] = NET_RATE_12M; 643 } 644 } 645 646 if (uSuppRatesBitMap & DRV_RATE_MASK_18_OFDM) 647 { 648 if (uBasicRatesBitMap & DRV_RATE_MASK_18_OFDM) 649 { 650 string[i++] = NET_RATE_18M_BASIC; 651 } 652 else 653 { 654 string[i++] = NET_RATE_18M; 655 } 656 } 657 658 if (uSuppRatesBitMap & DRV_RATE_MASK_24_OFDM) 659 { 660 if (uBasicRatesBitMap & DRV_RATE_MASK_24_OFDM) 661 { 662 string[i++] = NET_RATE_24M_BASIC; 663 } 664 else 665 { 666 string[i++] = NET_RATE_24M; 667 } 668 } 669 670 if (uSuppRatesBitMap & DRV_RATE_MASK_36_OFDM) 671 { 672 if (uBasicRatesBitMap & DRV_RATE_MASK_36_OFDM) 673 { 674 string[i++] = NET_RATE_36M_BASIC; 675 } 676 else 677 { 678 string[i++] = NET_RATE_36M; 679 } 680 } 681 682 if (uSuppRatesBitMap & DRV_RATE_MASK_48_OFDM) 683 { 684 if (uBasicRatesBitMap & DRV_RATE_MASK_48_OFDM) 685 { 686 string[i++] = NET_RATE_48M_BASIC; 687 } 688 else 689 { 690 string[i++] = NET_RATE_48M; 691 } 692 } 693 694 if (uSuppRatesBitMap & DRV_RATE_MASK_54_OFDM) 695 { 696 if (uBasicRatesBitMap & DRV_RATE_MASK_54_OFDM) 697 { 698 string[i++] = NET_RATE_54M_BASIC; 699 } 700 else 701 { 702 string[i++] = NET_RATE_54M; 703 } 704 } 705 706 *len = i; 707 708 return TI_OK; 709 } 710 711 712 /************************************************************************ 713 * bitMapToNetworkStringRates * 714 ************************************************************************ 715 DESCRIPTION: Converts bit map to the rates string 716 717 INPUT: suppRatesBitMap - bit map of supported rates 718 basicRatesBitMap - bit map of basic rates 719 720 OUTPUT: string - network format rates array, 721 len - rates array length 722 firstOFDMrateLoc - the index of first OFDM rate in the rates array. 723 724 725 RETURN: None 726 727 ************************************************************************/ 728 TI_STATUS rate_DrvBitmapToNetStrIncluding11n (TI_UINT32 uSuppRatesBitMap, 729 TI_UINT32 uBasicRatesBitMap, 730 TI_UINT8 *string, 731 TI_UINT32 *pFirstOfdmRate) 732 { 733 TI_UINT32 i = 0; 734 735 736 rate_DrvBitmapToNetStr (uSuppRatesBitMap, uBasicRatesBitMap, string, &i, pFirstOfdmRate); 737 738 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_0_OFDM) 739 { 740 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_0_OFDM) 741 { 742 string[i++] = NET_RATE_MCS0_BASIC; 743 } 744 else 745 { 746 string[i++] = NET_RATE_MCS0; 747 } 748 } 749 750 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_1_OFDM) 751 { 752 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_1_OFDM) 753 { 754 string[i++] = NET_RATE_MCS1_BASIC; 755 } 756 else 757 { 758 string[i++] = NET_RATE_MCS1; 759 } 760 } 761 762 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_2_OFDM) 763 { 764 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_2_OFDM) 765 { 766 string[i++] = NET_RATE_MCS2_BASIC; 767 } 768 else 769 { 770 string[i++] = NET_RATE_MCS2; 771 } 772 } 773 774 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_3_OFDM) 775 { 776 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_3_OFDM) 777 { 778 string[i++] = NET_RATE_MCS3_BASIC; 779 } 780 else 781 { 782 string[i++] = NET_RATE_MCS3; 783 } 784 } 785 786 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_4_OFDM) 787 { 788 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_4_OFDM) 789 { 790 string[i++] = NET_RATE_MCS4_BASIC; 791 } 792 else 793 { 794 string[i++] = NET_RATE_MCS4; 795 } 796 } 797 798 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_5_OFDM) 799 { 800 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_5_OFDM) 801 { 802 string[i++] = NET_RATE_MCS5_BASIC; 803 } 804 else 805 { 806 string[i++] = NET_RATE_MCS5; 807 } 808 } 809 810 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_6_OFDM) 811 { 812 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_6_OFDM) 813 { 814 string[i++] = NET_RATE_MCS6_BASIC; 815 } 816 else 817 { 818 string[i++] = NET_RATE_MCS6; 819 } 820 } 821 822 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_7_OFDM) 823 { 824 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_7_OFDM) 825 { 826 string[i++] = NET_RATE_MCS7_BASIC; 827 } 828 else 829 { 830 string[i++] = NET_RATE_MCS7; 831 } 832 } 833 834 835 return TI_OK; 836 } 837 838 /************************************************************************ 839 * networkStringToBitMapSuppRates * 840 ************************************************************************ 841 DESCRIPTION: Converts supported rates string to the bit map 842 843 INPUT: string - array of rates in the network format 844 len - array length 845 846 OUTPUT: bitMap - bit map of rates. 847 848 RETURN: None 849 850 ************************************************************************/ 851 TI_STATUS rate_NetStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string, TI_UINT32 len) 852 { 853 TI_UINT32 i; 854 855 *pBitMap = 0; 856 857 for (i = 0; i < len; i++) 858 { 859 switch (string[i]) 860 { 861 case NET_RATE_1M: 862 case NET_RATE_1M_BASIC: 863 *pBitMap |= DRV_RATE_MASK_1_BARKER; 864 break; 865 866 case NET_RATE_2M: 867 case NET_RATE_2M_BASIC: 868 *pBitMap |= DRV_RATE_MASK_2_BARKER; 869 break; 870 871 case NET_RATE_5_5M: 872 case NET_RATE_5_5M_BASIC: 873 *pBitMap |= DRV_RATE_MASK_5_5_CCK; 874 break; 875 876 case NET_RATE_11M: 877 case NET_RATE_11M_BASIC: 878 *pBitMap |= DRV_RATE_MASK_11_CCK; 879 break; 880 881 case NET_RATE_22M: 882 case NET_RATE_22M_BASIC: 883 *pBitMap |= DRV_RATE_MASK_22_PBCC; 884 break; 885 886 case NET_RATE_6M: 887 case NET_RATE_6M_BASIC: 888 *pBitMap |= DRV_RATE_MASK_6_OFDM; 889 break; 890 891 case NET_RATE_9M: 892 case NET_RATE_9M_BASIC: 893 *pBitMap |= DRV_RATE_MASK_9_OFDM; 894 break; 895 896 case NET_RATE_12M: 897 case NET_RATE_12M_BASIC: 898 *pBitMap |= DRV_RATE_MASK_12_OFDM; 899 break; 900 901 case NET_RATE_18M: 902 case NET_RATE_18M_BASIC: 903 *pBitMap |= DRV_RATE_MASK_18_OFDM; 904 break; 905 906 case NET_RATE_24M: 907 case NET_RATE_24M_BASIC: 908 *pBitMap |= DRV_RATE_MASK_24_OFDM; 909 break; 910 911 case NET_RATE_36M: 912 case NET_RATE_36M_BASIC: 913 *pBitMap |= DRV_RATE_MASK_36_OFDM; 914 break; 915 916 case NET_RATE_48M: 917 case NET_RATE_48M_BASIC: 918 *pBitMap |= DRV_RATE_MASK_48_OFDM; 919 break; 920 921 case NET_RATE_54M: 922 case NET_RATE_54M_BASIC: 923 *pBitMap |= DRV_RATE_MASK_54_OFDM; 924 break; 925 926 case NET_RATE_MCS0: 927 case NET_RATE_MCS0_BASIC: 928 *pBitMap |= DRV_RATE_MASK_MCS_0_OFDM; 929 break; 930 931 case NET_RATE_MCS1: 932 case NET_RATE_MCS1_BASIC: 933 *pBitMap |= DRV_RATE_MASK_MCS_1_OFDM; 934 break; 935 936 case NET_RATE_MCS2: 937 case NET_RATE_MCS2_BASIC: 938 *pBitMap |= DRV_RATE_MASK_MCS_2_OFDM; 939 break; 940 941 case NET_RATE_MCS3: 942 case NET_RATE_MCS3_BASIC: 943 *pBitMap |= DRV_RATE_MASK_MCS_3_OFDM; 944 break; 945 946 case NET_RATE_MCS4: 947 case NET_RATE_MCS4_BASIC: 948 *pBitMap |= DRV_RATE_MASK_MCS_4_OFDM; 949 break; 950 951 case NET_RATE_MCS5: 952 case NET_RATE_MCS5_BASIC: 953 *pBitMap |= DRV_RATE_MASK_MCS_5_OFDM; 954 break; 955 956 case NET_RATE_MCS6: 957 case NET_RATE_MCS6_BASIC: 958 *pBitMap |= DRV_RATE_MASK_MCS_6_OFDM; 959 break; 960 961 case NET_RATE_MCS7: 962 case NET_RATE_MCS7_BASIC: 963 *pBitMap |= DRV_RATE_MASK_MCS_7_OFDM; 964 break; 965 966 default: 967 break; 968 } 969 } 970 971 return TI_OK; 972 } 973 974 /************************************************************************ 975 * networkStringToBitMapBasicRates * 976 ************************************************************************ 977 DESCRIPTION: Converts basic rates string to the bit map 978 979 INPUT: string - array of rates in the network format 980 len - array length 981 982 OUTPUT: bitMap - bit map of rates. 983 984 RETURN: None 985 986 ************************************************************************/ 987 TI_STATUS rate_NetBasicStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string, TI_UINT32 len) 988 { 989 TI_UINT32 i; 990 991 *pBitMap = 0; 992 993 for (i = 0; i < len; i++) 994 { 995 switch (string[i]) 996 { 997 case NET_RATE_1M_BASIC: 998 *pBitMap |= DRV_RATE_MASK_1_BARKER; 999 break; 1000 1001 case NET_RATE_2M_BASIC: 1002 *pBitMap |= DRV_RATE_MASK_2_BARKER; 1003 break; 1004 1005 case NET_RATE_5_5M_BASIC: 1006 *pBitMap |= DRV_RATE_MASK_5_5_CCK; 1007 break; 1008 1009 case NET_RATE_11M_BASIC: 1010 *pBitMap |= DRV_RATE_MASK_11_CCK; 1011 break; 1012 1013 case NET_RATE_22M_BASIC: 1014 *pBitMap |= DRV_RATE_MASK_22_PBCC; 1015 break; 1016 1017 case NET_RATE_6M_BASIC: 1018 *pBitMap |= DRV_RATE_MASK_6_OFDM; 1019 break; 1020 1021 case NET_RATE_9M_BASIC: 1022 *pBitMap |= DRV_RATE_MASK_9_OFDM; 1023 break; 1024 1025 case NET_RATE_12M_BASIC: 1026 *pBitMap |= DRV_RATE_MASK_12_OFDM; 1027 break; 1028 1029 case NET_RATE_18M_BASIC: 1030 *pBitMap |= DRV_RATE_MASK_18_OFDM; 1031 break; 1032 1033 case NET_RATE_24M_BASIC: 1034 *pBitMap |= DRV_RATE_MASK_24_OFDM; 1035 break; 1036 1037 case NET_RATE_36M_BASIC: 1038 *pBitMap |= DRV_RATE_MASK_36_OFDM; 1039 break; 1040 1041 case NET_RATE_48M_BASIC: 1042 *pBitMap |= DRV_RATE_MASK_48_OFDM; 1043 break; 1044 1045 case NET_RATE_54M_BASIC: 1046 *pBitMap |= DRV_RATE_MASK_54_OFDM; 1047 break; 1048 1049 case NET_RATE_MCS0_BASIC: 1050 *pBitMap |= DRV_RATE_MASK_MCS_0_OFDM; 1051 break; 1052 1053 case NET_RATE_MCS1_BASIC: 1054 *pBitMap |= DRV_RATE_MASK_MCS_1_OFDM; 1055 break; 1056 1057 case NET_RATE_MCS2_BASIC: 1058 *pBitMap |= DRV_RATE_MASK_MCS_2_OFDM; 1059 break; 1060 1061 case NET_RATE_MCS3_BASIC: 1062 *pBitMap |= DRV_RATE_MASK_MCS_3_OFDM; 1063 break; 1064 1065 case NET_RATE_MCS4_BASIC: 1066 *pBitMap |= DRV_RATE_MASK_MCS_4_OFDM; 1067 break; 1068 1069 case NET_RATE_MCS5_BASIC: 1070 *pBitMap |= DRV_RATE_MASK_MCS_5_OFDM; 1071 break; 1072 1073 case NET_RATE_MCS6_BASIC: 1074 *pBitMap |= DRV_RATE_MASK_MCS_6_OFDM; 1075 break; 1076 1077 case NET_RATE_MCS7_BASIC: 1078 *pBitMap |= DRV_RATE_MASK_MCS_7_OFDM; 1079 break; 1080 1081 default: 1082 break; 1083 } 1084 } 1085 1086 return TI_OK; 1087 } 1088 1089 1090 /************************************************************************ 1091 * rate_McsNetStrToDrvBitmap * 1092 ************************************************************************ 1093 DESCRIPTION: Converts MCS IEs rates bit map to driver bit map. 1094 supported only MCS0 - MCS7 1095 1096 INPUT: string - HT capabilities IE in the network format 1097 len - IE array length 1098 1099 OUTPUT: bitMap - bit map of rates. 1100 1101 RETURN: None 1102 1103 ************************************************************************/ 1104 TI_STATUS rate_McsNetStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string) 1105 { 1106 *pBitMap = string[0]; 1107 1108 *pBitMap = *pBitMap << (DRV_RATE_MCS_0 - 1); 1109 1110 return TI_OK; 1111 } 1112 1113 1114 TI_STATUS rate_DrvBitmapToHwBitmap (TI_UINT32 uDrvBitMap, TI_UINT32 *pHwBitmap) 1115 { 1116 TI_UINT32 uHwBitMap = 0; 1117 1118 if (uDrvBitMap & DRV_RATE_MASK_1_BARKER) 1119 { 1120 uHwBitMap |= HW_BIT_RATE_1MBPS; 1121 } 1122 1123 if (uDrvBitMap & DRV_RATE_MASK_2_BARKER) 1124 { 1125 uHwBitMap |= HW_BIT_RATE_2MBPS; 1126 } 1127 1128 if (uDrvBitMap & DRV_RATE_MASK_5_5_CCK) 1129 { 1130 uHwBitMap |= HW_BIT_RATE_5_5MBPS; 1131 } 1132 1133 if (uDrvBitMap & DRV_RATE_MASK_11_CCK) 1134 { 1135 uHwBitMap |= HW_BIT_RATE_11MBPS; 1136 } 1137 1138 if (uDrvBitMap & DRV_RATE_MASK_22_PBCC) 1139 { 1140 uHwBitMap |= HW_BIT_RATE_22MBPS; 1141 } 1142 1143 if (uDrvBitMap & DRV_RATE_MASK_6_OFDM) 1144 { 1145 uHwBitMap |= HW_BIT_RATE_6MBPS; 1146 } 1147 1148 if (uDrvBitMap & DRV_RATE_MASK_9_OFDM) 1149 { 1150 uHwBitMap |= HW_BIT_RATE_9MBPS; 1151 } 1152 1153 if (uDrvBitMap & DRV_RATE_MASK_12_OFDM) 1154 { 1155 uHwBitMap |= HW_BIT_RATE_12MBPS; 1156 } 1157 1158 if (uDrvBitMap & DRV_RATE_MASK_18_OFDM) 1159 { 1160 uHwBitMap |= HW_BIT_RATE_18MBPS; 1161 } 1162 1163 if (uDrvBitMap & DRV_RATE_MASK_24_OFDM) 1164 { 1165 uHwBitMap |= HW_BIT_RATE_24MBPS; 1166 } 1167 1168 if (uDrvBitMap & DRV_RATE_MASK_36_OFDM) 1169 { 1170 uHwBitMap |= HW_BIT_RATE_36MBPS; 1171 } 1172 1173 if (uDrvBitMap & DRV_RATE_MASK_48_OFDM) 1174 { 1175 uHwBitMap |= HW_BIT_RATE_48MBPS; 1176 } 1177 1178 if (uDrvBitMap & DRV_RATE_MASK_54_OFDM) 1179 { 1180 uHwBitMap |= HW_BIT_RATE_54MBPS; 1181 } 1182 1183 if (uDrvBitMap & DRV_RATE_MASK_MCS_0_OFDM) 1184 { 1185 uHwBitMap |= HW_BIT_RATE_MCS_0; 1186 } 1187 1188 if (uDrvBitMap & DRV_RATE_MASK_MCS_1_OFDM) 1189 { 1190 uHwBitMap |= HW_BIT_RATE_MCS_1; 1191 } 1192 1193 if (uDrvBitMap & DRV_RATE_MASK_MCS_2_OFDM) 1194 { 1195 uHwBitMap |= HW_BIT_RATE_MCS_2; 1196 } 1197 1198 if (uDrvBitMap & DRV_RATE_MASK_MCS_3_OFDM) 1199 { 1200 uHwBitMap |= HW_BIT_RATE_MCS_3; 1201 } 1202 1203 if (uDrvBitMap & DRV_RATE_MASK_MCS_4_OFDM) 1204 { 1205 uHwBitMap |= HW_BIT_RATE_MCS_4; 1206 } 1207 1208 if (uDrvBitMap & DRV_RATE_MASK_MCS_5_OFDM) 1209 { 1210 uHwBitMap |= HW_BIT_RATE_MCS_5; 1211 } 1212 1213 if (uDrvBitMap & DRV_RATE_MASK_MCS_6_OFDM) 1214 { 1215 uHwBitMap |= HW_BIT_RATE_MCS_6; 1216 } 1217 1218 if (uDrvBitMap & DRV_RATE_MASK_MCS_7_OFDM) 1219 { 1220 uHwBitMap |= HW_BIT_RATE_MCS_7; 1221 } 1222 1223 *pHwBitmap = uHwBitMap; 1224 1225 return TI_OK; 1226 } 1227 1228 TI_STATUS rate_PolicyToDrv (ETxRateClassId ePolicyRate, ERate *eAppRate) 1229 { 1230 ERate Rate = DRV_RATE_AUTO; 1231 TI_STATUS status = TI_OK; 1232 1233 switch (ePolicyRate) 1234 { 1235 case txPolicy1 : Rate = DRV_RATE_1M ; break; 1236 case txPolicy2 : Rate = DRV_RATE_2M ; break; 1237 case txPolicy5_5 : Rate = DRV_RATE_5_5M ; break; 1238 case txPolicy11 : Rate = DRV_RATE_11M ; break; 1239 case txPolicy22 : Rate = DRV_RATE_22M ; break; 1240 case txPolicy6 : Rate = DRV_RATE_6M ; break; 1241 case txPolicy9 : Rate = DRV_RATE_9M ; break; 1242 case txPolicy12 : Rate = DRV_RATE_12M ; break; 1243 case txPolicy18 : Rate = DRV_RATE_18M ; break; 1244 case txPolicy24 : Rate = DRV_RATE_24M ; break; 1245 case txPolicy36 : Rate = DRV_RATE_36M ; break; 1246 case txPolicy48 : Rate = DRV_RATE_48M ; break; 1247 case txPolicy54 : Rate = DRV_RATE_54M ; break; 1248 case txPolicyMcs0 : Rate = DRV_RATE_MCS_0; break; 1249 case txPolicyMcs1 : Rate = DRV_RATE_MCS_1; break; 1250 case txPolicyMcs2 : Rate = DRV_RATE_MCS_2; break; 1251 case txPolicyMcs3 : Rate = DRV_RATE_MCS_3; break; 1252 case txPolicyMcs4 : Rate = DRV_RATE_MCS_4; break; 1253 case txPolicyMcs5 : Rate = DRV_RATE_MCS_5; break; 1254 case txPolicyMcs6 : Rate = DRV_RATE_MCS_6; break; 1255 case txPolicyMcs7 : Rate = DRV_RATE_MCS_7; break; 1256 1257 default: 1258 status = TI_NOK; 1259 break; 1260 } 1261 1262 if (status == TI_OK) 1263 *eAppRate = Rate; 1264 else 1265 *eAppRate = DRV_RATE_INVALID; 1266 1267 return status; 1268 } 1269 1270 1271 TI_UINT32 rate_BasicToDrvBitmap (EBasicRateSet eBasicRateSet, TI_BOOL bDot11a) 1272 { 1273 if (!bDot11a) 1274 { 1275 switch (eBasicRateSet) 1276 { 1277 case BASIC_RATE_SET_1_2: 1278 return DRV_RATE_MASK_1_BARKER | 1279 DRV_RATE_MASK_2_BARKER; 1280 1281 case BASIC_RATE_SET_1_2_5_5_11: 1282 return DRV_RATE_MASK_1_BARKER | 1283 DRV_RATE_MASK_2_BARKER | 1284 DRV_RATE_MASK_5_5_CCK | 1285 DRV_RATE_MASK_11_CCK; 1286 1287 case BASIC_RATE_SET_UP_TO_12: 1288 return DRV_RATE_MASK_1_BARKER | 1289 DRV_RATE_MASK_2_BARKER | 1290 DRV_RATE_MASK_5_5_CCK | 1291 DRV_RATE_MASK_11_CCK | 1292 DRV_RATE_MASK_6_OFDM | 1293 DRV_RATE_MASK_9_OFDM | 1294 DRV_RATE_MASK_12_OFDM; 1295 1296 case BASIC_RATE_SET_UP_TO_18: 1297 return DRV_RATE_MASK_1_BARKER | 1298 DRV_RATE_MASK_2_BARKER | 1299 DRV_RATE_MASK_5_5_CCK | 1300 DRV_RATE_MASK_11_CCK | 1301 DRV_RATE_MASK_6_OFDM | 1302 DRV_RATE_MASK_9_OFDM | 1303 DRV_RATE_MASK_12_OFDM | 1304 DRV_RATE_MASK_18_OFDM; 1305 1306 case BASIC_RATE_SET_UP_TO_24: 1307 return DRV_RATE_MASK_1_BARKER | 1308 DRV_RATE_MASK_2_BARKER | 1309 DRV_RATE_MASK_5_5_CCK | 1310 DRV_RATE_MASK_11_CCK | 1311 DRV_RATE_MASK_6_OFDM | 1312 DRV_RATE_MASK_9_OFDM | 1313 DRV_RATE_MASK_12_OFDM | 1314 DRV_RATE_MASK_18_OFDM | 1315 DRV_RATE_MASK_24_OFDM; 1316 1317 case BASIC_RATE_SET_UP_TO_36: 1318 return DRV_RATE_MASK_1_BARKER | 1319 DRV_RATE_MASK_2_BARKER | 1320 DRV_RATE_MASK_5_5_CCK | 1321 DRV_RATE_MASK_11_CCK | 1322 DRV_RATE_MASK_6_OFDM | 1323 DRV_RATE_MASK_9_OFDM | 1324 DRV_RATE_MASK_12_OFDM | 1325 DRV_RATE_MASK_18_OFDM | 1326 DRV_RATE_MASK_24_OFDM | 1327 DRV_RATE_MASK_36_OFDM; 1328 1329 case BASIC_RATE_SET_UP_TO_48: 1330 return DRV_RATE_MASK_1_BARKER | 1331 DRV_RATE_MASK_2_BARKER | 1332 DRV_RATE_MASK_5_5_CCK | 1333 DRV_RATE_MASK_11_CCK | 1334 DRV_RATE_MASK_6_OFDM | 1335 DRV_RATE_MASK_9_OFDM | 1336 DRV_RATE_MASK_12_OFDM | 1337 DRV_RATE_MASK_18_OFDM | 1338 DRV_RATE_MASK_24_OFDM | 1339 DRV_RATE_MASK_36_OFDM | 1340 DRV_RATE_MASK_48_OFDM; 1341 1342 case BASIC_RATE_SET_UP_TO_54: 1343 return DRV_RATE_MASK_1_BARKER | 1344 DRV_RATE_MASK_2_BARKER | 1345 DRV_RATE_MASK_5_5_CCK | 1346 DRV_RATE_MASK_11_CCK | 1347 DRV_RATE_MASK_6_OFDM | 1348 DRV_RATE_MASK_9_OFDM | 1349 DRV_RATE_MASK_12_OFDM | 1350 DRV_RATE_MASK_18_OFDM | 1351 DRV_RATE_MASK_24_OFDM | 1352 DRV_RATE_MASK_36_OFDM | 1353 DRV_RATE_MASK_48_OFDM | 1354 DRV_RATE_MASK_54_OFDM; 1355 1356 case BASIC_RATE_SET_6_12_24: 1357 return DRV_RATE_MASK_6_OFDM | 1358 DRV_RATE_MASK_12_OFDM | 1359 DRV_RATE_MASK_24_OFDM; 1360 1361 case BASIC_RATE_SET_1_2_5_5_6_11_12_24: 1362 return DRV_RATE_MASK_1_BARKER | 1363 DRV_RATE_MASK_2_BARKER | 1364 DRV_RATE_MASK_5_5_CCK | 1365 DRV_RATE_MASK_11_CCK | 1366 DRV_RATE_MASK_6_OFDM | 1367 DRV_RATE_MASK_12_OFDM | 1368 DRV_RATE_MASK_24_OFDM; 1369 1370 case BASIC_RATE_SET_ALL_MCS_RATES: 1371 return DRV_RATE_MASK_MCS_0_OFDM | 1372 DRV_RATE_MASK_MCS_1_OFDM | 1373 DRV_RATE_MASK_MCS_2_OFDM | 1374 DRV_RATE_MASK_MCS_3_OFDM | 1375 DRV_RATE_MASK_MCS_4_OFDM | 1376 DRV_RATE_MASK_MCS_5_OFDM | 1377 DRV_RATE_MASK_MCS_6_OFDM | 1378 DRV_RATE_MASK_MCS_7_OFDM | 1379 DRV_RATE_MASK_1_BARKER | 1380 DRV_RATE_MASK_2_BARKER | 1381 DRV_RATE_MASK_5_5_CCK | 1382 DRV_RATE_MASK_11_CCK; 1383 1384 1385 default: 1386 return DRV_RATE_MASK_1_BARKER | 1387 DRV_RATE_MASK_2_BARKER; 1388 } 1389 } 1390 else 1391 { 1392 switch (eBasicRateSet) 1393 { 1394 case BASIC_RATE_SET_UP_TO_12: 1395 return DRV_RATE_MASK_6_OFDM | 1396 DRV_RATE_MASK_9_OFDM | 1397 DRV_RATE_MASK_12_OFDM; 1398 1399 case BASIC_RATE_SET_UP_TO_18: 1400 return DRV_RATE_MASK_6_OFDM | 1401 DRV_RATE_MASK_9_OFDM | 1402 DRV_RATE_MASK_12_OFDM | 1403 DRV_RATE_MASK_18_OFDM; 1404 1405 case BASIC_RATE_SET_UP_TO_24: 1406 return DRV_RATE_MASK_6_OFDM | 1407 DRV_RATE_MASK_9_OFDM | 1408 DRV_RATE_MASK_12_OFDM | 1409 DRV_RATE_MASK_18_OFDM | 1410 DRV_RATE_MASK_24_OFDM; 1411 1412 case BASIC_RATE_SET_UP_TO_36: 1413 return DRV_RATE_MASK_6_OFDM | 1414 DRV_RATE_MASK_9_OFDM | 1415 DRV_RATE_MASK_12_OFDM | 1416 DRV_RATE_MASK_18_OFDM | 1417 DRV_RATE_MASK_24_OFDM | 1418 DRV_RATE_MASK_36_OFDM; 1419 1420 case BASIC_RATE_SET_UP_TO_48: 1421 return DRV_RATE_MASK_6_OFDM | 1422 DRV_RATE_MASK_9_OFDM | 1423 DRV_RATE_MASK_12_OFDM | 1424 DRV_RATE_MASK_18_OFDM | 1425 DRV_RATE_MASK_24_OFDM | 1426 DRV_RATE_MASK_36_OFDM | 1427 DRV_RATE_MASK_48_OFDM; 1428 1429 case BASIC_RATE_SET_UP_TO_54: 1430 return DRV_RATE_MASK_6_OFDM | 1431 DRV_RATE_MASK_9_OFDM | 1432 DRV_RATE_MASK_12_OFDM | 1433 DRV_RATE_MASK_18_OFDM | 1434 DRV_RATE_MASK_24_OFDM | 1435 DRV_RATE_MASK_36_OFDM | 1436 DRV_RATE_MASK_48_OFDM | 1437 DRV_RATE_MASK_54_OFDM; 1438 1439 case BASIC_RATE_SET_6_12_24: 1440 return DRV_RATE_MASK_6_OFDM | 1441 DRV_RATE_MASK_12_OFDM | 1442 DRV_RATE_MASK_24_OFDM; 1443 1444 case BASIC_RATE_SET_ALL_MCS_RATES: 1445 return DRV_RATE_MASK_MCS_0_OFDM | 1446 DRV_RATE_MASK_MCS_1_OFDM | 1447 DRV_RATE_MASK_MCS_2_OFDM | 1448 DRV_RATE_MASK_MCS_3_OFDM | 1449 DRV_RATE_MASK_MCS_4_OFDM | 1450 DRV_RATE_MASK_MCS_5_OFDM | 1451 DRV_RATE_MASK_MCS_6_OFDM | 1452 DRV_RATE_MASK_MCS_7_OFDM | 1453 DRV_RATE_MASK_6_OFDM | 1454 DRV_RATE_MASK_12_OFDM | 1455 DRV_RATE_MASK_24_OFDM; 1456 1457 default: 1458 return DRV_RATE_MASK_6_OFDM | 1459 DRV_RATE_MASK_12_OFDM | 1460 DRV_RATE_MASK_24_OFDM; 1461 } 1462 } 1463 } 1464 1465 TI_UINT32 rate_SupportedToDrvBitmap (ESupportedRateSet eSupportedRateSet, TI_BOOL bDot11a) 1466 { 1467 if (!bDot11a) 1468 { 1469 switch (eSupportedRateSet) 1470 { 1471 case SUPPORTED_RATE_SET_1_2: 1472 return DRV_RATE_MASK_1_BARKER | 1473 DRV_RATE_MASK_2_BARKER; 1474 1475 case SUPPORTED_RATE_SET_1_2_5_5_11: 1476 return DRV_RATE_MASK_1_BARKER | 1477 DRV_RATE_MASK_2_BARKER | 1478 DRV_RATE_MASK_5_5_CCK | 1479 DRV_RATE_MASK_11_CCK; 1480 1481 case SUPPORTED_RATE_SET_1_2_5_5_11_22: 1482 return DRV_RATE_MASK_1_BARKER | 1483 DRV_RATE_MASK_2_BARKER | 1484 DRV_RATE_MASK_5_5_CCK | 1485 DRV_RATE_MASK_11_CCK | 1486 DRV_RATE_MASK_22_PBCC; 1487 1488 case SUPPORTED_RATE_SET_UP_TO_18: 1489 return DRV_RATE_MASK_1_BARKER | 1490 DRV_RATE_MASK_2_BARKER | 1491 DRV_RATE_MASK_5_5_CCK | 1492 DRV_RATE_MASK_11_CCK | 1493 DRV_RATE_MASK_6_OFDM | 1494 DRV_RATE_MASK_9_OFDM | 1495 DRV_RATE_MASK_12_OFDM | 1496 DRV_RATE_MASK_18_OFDM; 1497 1498 case SUPPORTED_RATE_SET_UP_TO_24: 1499 return DRV_RATE_MASK_1_BARKER | 1500 DRV_RATE_MASK_2_BARKER | 1501 DRV_RATE_MASK_5_5_CCK | 1502 DRV_RATE_MASK_11_CCK | 1503 DRV_RATE_MASK_6_OFDM | 1504 DRV_RATE_MASK_9_OFDM | 1505 DRV_RATE_MASK_12_OFDM | 1506 DRV_RATE_MASK_18_OFDM | 1507 DRV_RATE_MASK_24_OFDM; 1508 1509 case SUPPORTED_RATE_SET_UP_TO_36: 1510 return DRV_RATE_MASK_1_BARKER | 1511 DRV_RATE_MASK_2_BARKER | 1512 DRV_RATE_MASK_5_5_CCK | 1513 DRV_RATE_MASK_11_CCK | 1514 DRV_RATE_MASK_6_OFDM | 1515 DRV_RATE_MASK_9_OFDM | 1516 DRV_RATE_MASK_12_OFDM | 1517 DRV_RATE_MASK_18_OFDM | 1518 DRV_RATE_MASK_24_OFDM | 1519 DRV_RATE_MASK_36_OFDM; 1520 1521 case SUPPORTED_RATE_SET_UP_TO_48: 1522 return DRV_RATE_MASK_1_BARKER | 1523 DRV_RATE_MASK_2_BARKER | 1524 DRV_RATE_MASK_5_5_CCK | 1525 DRV_RATE_MASK_11_CCK | 1526 DRV_RATE_MASK_6_OFDM | 1527 DRV_RATE_MASK_9_OFDM | 1528 DRV_RATE_MASK_12_OFDM | 1529 DRV_RATE_MASK_18_OFDM | 1530 DRV_RATE_MASK_24_OFDM | 1531 DRV_RATE_MASK_36_OFDM | 1532 DRV_RATE_MASK_48_OFDM; 1533 1534 case SUPPORTED_RATE_SET_UP_TO_54: 1535 return DRV_RATE_MASK_1_BARKER | 1536 DRV_RATE_MASK_2_BARKER | 1537 DRV_RATE_MASK_5_5_CCK | 1538 DRV_RATE_MASK_11_CCK | 1539 DRV_RATE_MASK_6_OFDM | 1540 DRV_RATE_MASK_9_OFDM | 1541 DRV_RATE_MASK_12_OFDM | 1542 DRV_RATE_MASK_18_OFDM | 1543 DRV_RATE_MASK_24_OFDM | 1544 DRV_RATE_MASK_36_OFDM | 1545 DRV_RATE_MASK_48_OFDM | 1546 DRV_RATE_MASK_54_OFDM; 1547 1548 case SUPPORTED_RATE_SET_ALL: 1549 return DRV_RATE_MASK_1_BARKER | 1550 DRV_RATE_MASK_2_BARKER | 1551 DRV_RATE_MASK_5_5_CCK | 1552 DRV_RATE_MASK_11_CCK | 1553 DRV_RATE_MASK_22_PBCC | 1554 DRV_RATE_MASK_6_OFDM | 1555 DRV_RATE_MASK_9_OFDM | 1556 DRV_RATE_MASK_12_OFDM | 1557 DRV_RATE_MASK_18_OFDM | 1558 DRV_RATE_MASK_24_OFDM | 1559 DRV_RATE_MASK_36_OFDM | 1560 DRV_RATE_MASK_48_OFDM | 1561 DRV_RATE_MASK_54_OFDM; 1562 1563 case SUPPORTED_RATE_SET_ALL_OFDM: 1564 return DRV_RATE_MASK_6_OFDM | 1565 DRV_RATE_MASK_9_OFDM | 1566 DRV_RATE_MASK_12_OFDM | 1567 DRV_RATE_MASK_18_OFDM | 1568 DRV_RATE_MASK_24_OFDM | 1569 DRV_RATE_MASK_36_OFDM | 1570 DRV_RATE_MASK_48_OFDM | 1571 DRV_RATE_MASK_54_OFDM; 1572 1573 case SUPPORTED_RATE_SET_ALL_MCS_RATES: 1574 return DRV_RATE_MASK_MCS_0_OFDM | 1575 DRV_RATE_MASK_MCS_1_OFDM | 1576 DRV_RATE_MASK_MCS_2_OFDM | 1577 DRV_RATE_MASK_MCS_3_OFDM | 1578 DRV_RATE_MASK_MCS_4_OFDM | 1579 DRV_RATE_MASK_MCS_5_OFDM | 1580 DRV_RATE_MASK_MCS_6_OFDM | 1581 DRV_RATE_MASK_MCS_7_OFDM | 1582 DRV_RATE_MASK_1_BARKER | 1583 DRV_RATE_MASK_2_BARKER | 1584 DRV_RATE_MASK_5_5_CCK | 1585 DRV_RATE_MASK_11_CCK | 1586 DRV_RATE_MASK_22_PBCC | 1587 DRV_RATE_MASK_6_OFDM | 1588 DRV_RATE_MASK_9_OFDM | 1589 DRV_RATE_MASK_12_OFDM | 1590 DRV_RATE_MASK_18_OFDM | 1591 DRV_RATE_MASK_24_OFDM | 1592 DRV_RATE_MASK_36_OFDM | 1593 DRV_RATE_MASK_48_OFDM | 1594 DRV_RATE_MASK_54_OFDM; 1595 1596 default: 1597 return DRV_RATE_MASK_1_BARKER | 1598 DRV_RATE_MASK_2_BARKER | 1599 DRV_RATE_MASK_5_5_CCK | 1600 DRV_RATE_MASK_11_CCK | 1601 DRV_RATE_MASK_22_PBCC | 1602 DRV_RATE_MASK_6_OFDM | 1603 DRV_RATE_MASK_9_OFDM | 1604 DRV_RATE_MASK_12_OFDM | 1605 DRV_RATE_MASK_18_OFDM | 1606 DRV_RATE_MASK_24_OFDM | 1607 DRV_RATE_MASK_36_OFDM | 1608 DRV_RATE_MASK_48_OFDM | 1609 DRV_RATE_MASK_54_OFDM; 1610 } 1611 } 1612 else 1613 { 1614 switch (eSupportedRateSet) 1615 { 1616 case SUPPORTED_RATE_SET_UP_TO_18: 1617 return DRV_RATE_MASK_6_OFDM | 1618 DRV_RATE_MASK_9_OFDM | 1619 DRV_RATE_MASK_12_OFDM | 1620 DRV_RATE_MASK_18_OFDM; 1621 1622 case SUPPORTED_RATE_SET_UP_TO_24: 1623 return DRV_RATE_MASK_6_OFDM | 1624 DRV_RATE_MASK_9_OFDM | 1625 DRV_RATE_MASK_12_OFDM | 1626 DRV_RATE_MASK_18_OFDM | 1627 DRV_RATE_MASK_24_OFDM; 1628 1629 case SUPPORTED_RATE_SET_UP_TO_36: 1630 return DRV_RATE_MASK_6_OFDM | 1631 DRV_RATE_MASK_9_OFDM | 1632 DRV_RATE_MASK_12_OFDM | 1633 DRV_RATE_MASK_18_OFDM | 1634 DRV_RATE_MASK_24_OFDM | 1635 DRV_RATE_MASK_36_OFDM; 1636 1637 case SUPPORTED_RATE_SET_UP_TO_48: 1638 return DRV_RATE_MASK_6_OFDM | 1639 DRV_RATE_MASK_9_OFDM | 1640 DRV_RATE_MASK_12_OFDM | 1641 DRV_RATE_MASK_18_OFDM | 1642 DRV_RATE_MASK_24_OFDM | 1643 DRV_RATE_MASK_36_OFDM | 1644 DRV_RATE_MASK_48_OFDM; 1645 1646 case SUPPORTED_RATE_SET_UP_TO_54: 1647 return DRV_RATE_MASK_6_OFDM | 1648 DRV_RATE_MASK_9_OFDM | 1649 DRV_RATE_MASK_12_OFDM | 1650 DRV_RATE_MASK_18_OFDM | 1651 DRV_RATE_MASK_24_OFDM | 1652 DRV_RATE_MASK_36_OFDM | 1653 DRV_RATE_MASK_48_OFDM | 1654 DRV_RATE_MASK_54_OFDM; 1655 1656 case SUPPORTED_RATE_SET_ALL: 1657 case SUPPORTED_RATE_SET_ALL_OFDM: 1658 return DRV_RATE_MASK_6_OFDM | 1659 DRV_RATE_MASK_9_OFDM | 1660 DRV_RATE_MASK_12_OFDM | 1661 DRV_RATE_MASK_18_OFDM | 1662 DRV_RATE_MASK_24_OFDM | 1663 DRV_RATE_MASK_36_OFDM | 1664 DRV_RATE_MASK_48_OFDM | 1665 DRV_RATE_MASK_54_OFDM; 1666 1667 case SUPPORTED_RATE_SET_ALL_MCS_RATES: 1668 return DRV_RATE_MASK_MCS_0_OFDM | 1669 DRV_RATE_MASK_MCS_1_OFDM | 1670 DRV_RATE_MASK_MCS_2_OFDM | 1671 DRV_RATE_MASK_MCS_3_OFDM | 1672 DRV_RATE_MASK_MCS_4_OFDM | 1673 DRV_RATE_MASK_MCS_5_OFDM | 1674 DRV_RATE_MASK_MCS_6_OFDM | 1675 DRV_RATE_MASK_MCS_7_OFDM | 1676 DRV_RATE_MASK_6_OFDM | 1677 DRV_RATE_MASK_9_OFDM | 1678 DRV_RATE_MASK_12_OFDM | 1679 DRV_RATE_MASK_18_OFDM | 1680 DRV_RATE_MASK_24_OFDM | 1681 DRV_RATE_MASK_36_OFDM | 1682 DRV_RATE_MASK_48_OFDM | 1683 DRV_RATE_MASK_54_OFDM; 1684 1685 default: 1686 return DRV_RATE_MASK_6_OFDM | 1687 DRV_RATE_MASK_9_OFDM | 1688 DRV_RATE_MASK_12_OFDM | 1689 DRV_RATE_MASK_18_OFDM | 1690 DRV_RATE_MASK_24_OFDM | 1691 DRV_RATE_MASK_36_OFDM | 1692 DRV_RATE_MASK_48_OFDM | 1693 DRV_RATE_MASK_54_OFDM; 1694 } 1695 } 1696 } 1697 1698 TI_STATUS rate_ValidateVsBand (TI_UINT32 *pSupportedMask, TI_UINT32 *pBasicMask, TI_BOOL bDot11a) 1699 { 1700 if (bDot11a) 1701 { 1702 *pSupportedMask &= ~ 1703 ( 1704 DRV_RATE_MASK_1_BARKER | 1705 DRV_RATE_MASK_2_BARKER | 1706 DRV_RATE_MASK_5_5_CCK | 1707 DRV_RATE_MASK_11_CCK | 1708 DRV_RATE_MASK_22_PBCC 1709 ); 1710 } 1711 1712 *pBasicMask &= *pSupportedMask; 1713 1714 if (*pBasicMask == 0) 1715 { 1716 if (bDot11a) 1717 { 1718 *pBasicMask = DRV_RATE_MASK_6_OFDM | DRV_RATE_MASK_12_OFDM | DRV_RATE_MASK_24_OFDM; 1719 } 1720 else 1721 { 1722 *pBasicMask = DRV_RATE_MASK_1_BARKER | DRV_RATE_MASK_2_BARKER; 1723 } 1724 } 1725 1726 return TI_OK; 1727 } 1728 1729 /*----------------------------------------------------------------------------- 1730 Routine Name: RateNumberToHost 1731 Routine Description: 1732 Arguments: 1733 Return Value: None 1734 -----------------------------------------------------------------------------*/ 1735 ERate rate_NumberToDrv (TI_UINT32 rate) 1736 { 1737 switch (rate) 1738 { 1739 case 0x1: 1740 return DRV_RATE_1M; 1741 1742 case 0x2: 1743 return DRV_RATE_2M; 1744 1745 case 0x5: 1746 return DRV_RATE_5_5M; 1747 1748 case 0xB: 1749 return DRV_RATE_11M; 1750 1751 case 0x16: 1752 return DRV_RATE_22M; 1753 1754 case 0x6: 1755 return DRV_RATE_6M; 1756 1757 case 0x9: 1758 return DRV_RATE_9M; 1759 1760 case 0xC: 1761 return DRV_RATE_12M; 1762 1763 case 0x12: 1764 return DRV_RATE_18M; 1765 1766 case 0x18: 1767 return DRV_RATE_24M; 1768 1769 case 0x24: 1770 return DRV_RATE_36M; 1771 1772 case 0x30: 1773 return DRV_RATE_48M; 1774 1775 case 0x36: 1776 return DRV_RATE_54M; 1777 1778 /* MCS rate */ 1779 case 0x7: 1780 return DRV_RATE_MCS_0; 1781 1782 case 0xD: 1783 return DRV_RATE_MCS_1; 1784 1785 case 0x13: 1786 return DRV_RATE_MCS_2; 1787 1788 case 0x1A: 1789 return DRV_RATE_MCS_3; 1790 1791 case 0x27: 1792 return DRV_RATE_MCS_4; 1793 1794 case 0x34: 1795 return DRV_RATE_MCS_5; 1796 1797 case 0x3A: 1798 return DRV_RATE_MCS_6; 1799 1800 case 0x41: 1801 return DRV_RATE_MCS_7; 1802 1803 default: 1804 return DRV_RATE_6M; 1805 } 1806 } 1807 1808 TI_UINT32 rate_GetDrvBitmapForDefaultBasicSet () 1809 { 1810 return rate_BasicToDrvBitmap (BASIC_RATE_SET_1_2_5_5_11, TI_FALSE); 1811 } 1812 1813 TI_UINT32 rate_GetDrvBitmapForDefaultSupporteSet () 1814 { 1815 return rate_SupportedToDrvBitmap (SUPPORTED_RATE_SET_1_2_5_5_11, TI_FALSE); 1816 } 1817 1818
