| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 489 /// BRCOND - Conditional branch. The first operand is the chain, the
493 BRCOND,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 51 BRCOND, // Conditional branch.
|
| ARMISelLowering.cpp | [all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 251 case ISD::BRCOND: return "brcond";
|
| SelectionDAGBuilder.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 761 case ISD::BRCOND: Res = PromoteIntOp_BRCOND(N, OpNo); break;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 116 BRCOND,
[all...] |
| X86ISelLowering.cpp | 371 setOperationAction(ISD::BRCOND , MVT::Other, Custom);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 111 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 743 // Sparc doesn't have BRCOND either, it has BR_CC.
744 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | 243 // If the block ends with Hexagon::BRCOND and Hexagon:JMP, handle it.
244 if (((SecondLastInst->getOpcode() == Hexagon::BRCOND) ||
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 143 // which is used implicitly by brcond and select operations.
159 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
793 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 184 // PowerPC does not have BRCOND which requires SetCC
185 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
[all...] |
