| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 1 //===-- X86ISelLowering.h - X86 DAG Lowering Interface ----------*- C++ -*-===//
11 // selection DAG.
29 // X86 Specific DAG Nodes
459 SelectionDAG &DAG) const;
499 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
505 SelectionDAG &DAG) const;
528 /// DAG node.
540 const SelectionDAG &DAG,
551 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
571 SelectionDAG &DAG) const
[all...] |
| X86SelectionDAGInfo.cpp | 30 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
57 Type *IntPtrTy = getTargetData()->getIntPtrType(*DAG.getContext());
66 CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()),
70 DAG.getExternalSymbol(bzeroEntry, IntPtr), Args,
71 DAG, dl);
113 Count = DAG.getIntPtrConstant(SizeVal);
119 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
123 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
128 Count = DAG.getIntPtrConstant(SizeVal)
[all...] |
| X86ISelLowering.cpp | 1 //===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===//
11 // selection DAG.
58 static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
61 /// Generate a DAG to grab 128-bits from a vector > 128 bits. This
67 SelectionDAG &DAG, DebugLoc dl) {
72 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT,
77 return DAG.getUNDEF(ResultVT);
88 SDValue VecIdx = DAG.getIntPtrConstant(NormalizedIdxVal);
89 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
95 /// Generate a DAG to put 128-bits into a vector > 128 bits. Thi
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 52 SelectionDAG &DAG;
63 explicit SelectionDAGLegalize(SelectionDAG &DAG);
156 DAG.RemoveDeadNode(N);
162 DAG.ReplaceAllUsesWith(Old, New);
166 DAG.ReplaceAllUsesWith(Old, New);
170 DAG.ReplaceAllUsesWith(Old, New);
191 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
205 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
208 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
209 : SelectionDAG::DAGUpdateListener(dag),
[all...] |
| LegalizeIntegerTypes.cpp | 36 DEBUG(dbgs() << "Promote integer result: "; N->dump(&DAG); dbgs() << "\n");
47 N->dump(&DAG); dbgs() << "\n";
156 return DAG.getNode(ISD::AssertSext, N->getDebugLoc(),
163 return DAG.getNode(ISD::AssertZext, N->getDebugLoc(),
168 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
169 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
182 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
196 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
209 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT);
211 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT)
[all...] |
| LegalizeVectorTypes.cpp | 35 N->dump(&DAG);
43 N->dump(&DAG);
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
151 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
161 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
168 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
169 Op0, DAG.getValueType(NewVT),
170 DAG.getValueType(Op0.getValueType()),
177 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc()
[all...] |
| SelectionDAGBuilder.cpp | 1 //===-- SelectionDAGBuilder.cpp - Selection-DAG building ------------------===//
74 // Limit the width of DAG chains. This is important in general to prevent
75 // prevent DAG-based analysis from blowing up. For example, alias analysis and
78 // future analyses are likely to have the same behavior. Limiting DAG width is
90 static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
99 static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
104 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT);
107 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
121 ValueVT : EVT::getIntegerVT(*DAG.getContext(), RoundBits);
124 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2)
[all...] |
| LegalizeTypesGeneric.cpp | 41 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
80 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 1 //===-- HexagonISelLowering.h - Hexagon DAG Lowering Interface --*- C++ -*-===//
11 // selection DAG.
80 SelectionDAG& DAG) const;
85 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
95 DebugLoc dl, SelectionDAG &DAG,
97 SDValue LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 1 //===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
11 // selection DAG.
84 DebugLoc dl, SelectionDAG &DAG) const {
86 MachineFunction &MF = DAG.getMachineFunction();
92 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
93 DAG.getTarget(), RVLocs, *DAG.getContext());
113 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
127 SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
128 Chain = DAG.getCopyToReg(Chain, dl, SP::I0, Val, Flag)
[all...] |
| SparcISelLowering.h | 1 //===-- SparcISelLowering.h - Sparc DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
47 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
55 const SelectionDAG &DAG,
75 DebugLoc dl, SelectionDAG &DAG,
87 DebugLoc dl, SelectionDAG &DAG) const;
89 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
92 unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const;
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 1 //===-- SPUISelLowering.cpp - Cell SPU DAG Lowering Implementation --------===//
48 //! Expand a library call into an actual call DAG node
56 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG,
61 SDValue InChain = DAG.getEntryNode();
67 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
74 SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
79 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
86 Callee, Args, DAG, Op.getDebugLoc());
466 // We have target-specific dag combine patterns for the following nodes:
560 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST)
[all...] |
| SPUISelLowering.h | 1 //===-- SPUISelLowering.h - Cell SPU DAG Lowering Interface -----*- C++ -*-===//
11 // a selection DAG.
64 SDValue get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
66 SDValue get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
68 SDValue get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
70 SDValue get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
72 SDValue get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
74 SDValue get_v4i32_imm(SDNode *N, SelectionDAG &DAG);
75 SDValue get_v2i64_imm(SDNode *N, SelectionDAG &DAG);
77 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 1 //===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
82 /// DAG node.
85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
159 // We have target-specific dag combine patterns for the following nodes:
167 LowerOperation(SDValue Op, SelectionDAG &DAG) const {
170 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
171 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
172 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
173 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
174 case ISD::BR_JT: return LowerBR_JT(Op, DAG);
175 case ISD::LOAD: return LowerLOAD(Op, DAG);
176 case ISD::STORE: return LowerSTORE(Op, DAG);
[all...] |
| XCoreISelLowering.h | 1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
87 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
93 SelectionDAG &DAG) const;
96 // DAG node.
115 DebugLoc dl, SelectionDAG &DAG,
123 DebugLoc dl, SelectionDAG &DAG,
128 DebugLoc dl, SelectionDAG &DAG,
130 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
132 SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 1 //===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===//
11 // selection DAG.
239 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
249 /// DAG node.
263 SelectionDAG &DAG) const;
269 SelectionDAG &DAG) const;
275 SelectionDAG &DAG) const;
280 SelectionDAG &DAG) const;
286 SelectionDAG &DAG) const;
292 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const
[all...] |
| PPCISelLowering.cpp | 1 //===-- PPCISelLowering.cpp - PPC DAG Lowering Implementation -------------===//
418 // We have target-specific dag combine patterns for the following nodes:
734 SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 29 ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
66 Loads[i] = DAG.getLoad(VT, dl, Chain,
67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
68 DAG.getConstant(SrcOff, MVT::i32)),
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
78 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
80 DAG.getConstant(DstOff, MVT::i32)),
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
105 Loads[i] = DAG.getLoad(VT, dl, Chain
[all...] |
| ARMISelLowering.h | 1 //===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
11 // selection DAG.
31 // ARM Specific DAG Nodes
253 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
259 SelectionDAG &DAG) const;
278 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
316 SelectionDAG &DAG) const;
324 SelectionDAG &DAG) const;
329 const SelectionDAG &DAG,
353 SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
11 // selection DAG.
109 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
112 // DAG node.
129 DebugLoc dl, SelectionDAG &DAG,
133 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
134 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
135 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
136 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
137 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
[all...] |
| MipsISelLowering.cpp | 1 //===-- MipsISelLowering.cpp - Mips DAG Lowering Implementation -----------===//
11 // selection DAG.
53 static SDValue GetGlobalReg(SelectionDAG &DAG, EVT Ty) {
54 MipsFunctionInfo *FI = DAG.getMachineFunction().getInfo<MipsFunctionInfo>();
55 return DAG.getRegister(FI->getGlobalBaseReg(), Ty);
472 static SDValue PerformADDECombine(SDNode *N, SelectionDAG &DAG,
479 SelectMadd(N, &DAG))
485 static SDValue PerformSUBECombine(SDNode *N, SelectionDAG &DAG,
492 SelectMsub(N, &DAG))
498 static SDValue PerformDivRemCombine(SDNode *N, SelectionDAG &DAG,
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 1 //===-- MBlazeISelLowering.h - MBlaze DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
101 // DAG node.
116 DebugLoc dl, SelectionDAG &DAG,
120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 1 //===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
71 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
73 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
75 SelectionDAG &DAG) const;
105 SelectionDAG &DAG,
119 SelectionDAG &DAG) const;
123 SelectionDAG &DAG) const;
135 SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx, EVT =
137 SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT = MVT::i32) const
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl,
90 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
|
