| /external/llvm/include/llvm/Target/ |
| TargetOpcodes.h | 68 /// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
69 DBG_VALUE = 11,
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| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 607 bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; }
665 case TargetOpcode::DBG_VALUE:
[all...] |
| /external/llvm/lib/CodeGen/ |
| ExpandPostRAPseudos.cpp | 224 case TargetOpcode::DBG_VALUE:
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| LiveDebugVariables.cpp | 12 // Remove all DBG_VALUE instructions referencing virtual registers and replace
17 // are moved between registers and stack slots. Finally emit new DBG_VALUE
99 /// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
127 /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
210 // A later DBG_VALUE at the same SlotIndex overrides the old location.
262 /// emitDebugVariables - Recreate DBG_VALUE instruction from data structures.
266 /// findDebugLoc - Return DebugLoc used for this DBG_VALUE instruction. A
267 /// variable may have more than one corresponding DBG_VALUE instructions.
306 /// handleDebugValue - Add DBG_VALUE instruction to our maps.
307 /// @param MI DBG_VALUE instructio
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.cpp | 209 if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
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| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 68 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE))
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| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 303 case TargetOpcode::DBG_VALUE:
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| /external/llvm/lib/Target/XCore/ |
| XCoreAsmPrinter.cpp | 309 case XCore::DBG_VALUE: {
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| XCoreInstrInfo.cpp | 393 MachineInstrBuilder MIB = BuildMI(MF, DL, get(XCore::DBG_VALUE))
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| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 121 MachineInstrBuilder MIB = BuildMI(MF, dl, get(SP::DBG_VALUE))
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| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 752 MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE));
781 case PPC::DBG_VALUE:
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| PPCAsmPrinter.cpp | 93 DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
306 case TargetOpcode::DBG_VALUE: {
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| PPCRegisterInfo.cpp | 578 if (OpC == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 624 TII.get(TargetOpcode::DBG_VALUE))
633 case Intrinsic::dbg_value: {
634 // This form of DBG_VALUE is target-independent.
636 const MCInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
[all...] |
| SelectionDAGISel.cpp | 382 // Insert DBG_VALUE instructions for function arguments to the entry block.
405 TII.get(TargetOpcode::DBG_VALUE))
410 // that COPY instructions also need DBG_VALUE, if it is the only
426 TII.get(TargetOpcode::DBG_VALUE))
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| InstrEmitter.cpp | 635 /// EmitDbgValue - Generate machine instruction for a dbg_value node.
651 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
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| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 641 case TargetOpcode::DBG_VALUE:
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| X86FrameLowering.cpp | [all...] |
| X86FastISel.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXAsmPrinter.cpp | [all...] |
| VectorElementize.cpp | 604 (Instr->getOpcode() == TargetOpcode::DBG_VALUE))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 566 case TargetOpcode::DBG_VALUE:
[all...] |
| ARMAsmPrinter.cpp | 220 DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 553 /// of DBG_VALUE, returning true if it was able to do so. A false return
701 case TargetOpcode::DBG_VALUE:
800 /// getDebugValueLocation - Get location information encoded by DBG_VALUE
804 // Target specific DBG_VALUE instructions are handled by each target.
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