| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 417 LegalizeAction getLoadExtAction(unsigned ExtType, EVT VT) const {
418 assert(ExtType < ISD::LAST_LOADEXT_TYPE &&
421 return (LegalizeAction)LoadExtActions[VT.getSimpleVT().SimpleTy][ExtType];
426 bool isLoadExtLegal(unsigned ExtType, EVT VT) const {
427 return VT.isSimple() && getLoadExtAction(ExtType, VT) == Legal;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 135 ISD::LoadExtType ExtType = LD->getExtensionType();
136 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) {
358 ISD::LoadExtType ExtType = LD->getExtensionType();
366 SDValue ScalarLoad = DAG.getExtLoad(ExtType, dl,
|
| LegalizeDAG.cpp | [all...] |
| LegalizeVectorTypes.cpp | 786 ISD::LoadExtType ExtType = LD->getExtensionType();
799 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
806 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
[all...] |
| LegalizeIntegerTypes.cpp | 416 ISD::LoadExtType ExtType =
419 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(),
[all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | 158 ISD::NodeType ExtType);
722 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD)
727 return DAG.getExtLoad(ExtType, dl, PVT,
[all...] |
| LegalizeTypes.h | 662 /// ExtType: extension element type
664 LoadSDNode *LD, ISD::LoadExtType ExtType);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 698 SDValue getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
705 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
712 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 566 ISD::LoadExtType ExtType = LN->getExtensionType();
738 if (ExtType == ISD::SEXTLOAD) {
740 } else if (ExtType == ISD::ZEXTLOAD) {
742 } else if (ExtType == ISD::EXTLOAD) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
