/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 451 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 455 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, [all...] |
/ndk/sources/host-tools/nawk-20071023/ |
awk.h | 123 #define FSIN 9
|
lex.c | 79 { "sin", FSIN, BLTIN },
|
run.c | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 141 case ISD::FSIN: return "fsin";
|
LegalizeVectorOps.cpp | 210 case ISD::FSIN:
|
LegalizeFloatTypes.cpp | 89 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; [all...] |
LegalizeVectorTypes.cpp | 86 case ISD::FSIN: 522 case ISD::FSIN: [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | 444 case ISD::FSIN: 518 case ISD::FSIN: [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 760 setOperationAction(ISD::FSIN , MVT::f64, Expand); 764 setOperationAction(ISD::FSIN , MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 82 setOperationAction(ISD::FSIN, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 210 setOperationAction(ISD::FSIN , MVT::f64, Expand); 213 setOperationAction(ISD::FSIN , MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 596 setOperationAction(ISD::FSIN , MVT::f64, Expand); 598 setOperationAction(ISD::FSIN , MVT::f32, Expand); 624 setOperationAction(ISD::FSIN , MVT::f32, Expand); 635 setOperationAction(ISD::FSIN , MVT::f64 , Expand); 650 setOperationAction(ISD::FSIN , MVT::f64 , Expand); 688 setOperationAction(ISD::FSIN , MVT::f80 , Expand); 735 setOperationAction(ISD::FSIN, (MVT::SimpleValueType)VT, Expand); [all...] |
/dalvik/vm/compiler/codegen/x86/libenc/ |
enc_tabl.cpp | 960 BEGIN_MNEMONIC(FSIN, MF_NONE, DU) [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 227 setOperationAction(ISD::FSIN, MVT::f32, Expand); 228 setOperationAction(ISD::FSIN, MVT::f64, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 133 setOperationAction(ISD::FSIN , MVT::f64, Expand); 138 setOperationAction(ISD::FSIN , MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 491 setOperationAction(ISD::FSIN, MVT::v2f64, Expand); 508 setOperationAction(ISD::FSIN, MVT::v4f32, Expand); [all...] |