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    Searched refs:FSUB (Results 1 - 25 of 41) sorted by null

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  /external/javassist/src/main/javassist/bytecode/
Opcode.java 110 int FSUB = 102;
346 -1, // fsub, 102
  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 234 FADD, FSUB, FMUL, FMA, FDIV, FREM,
    [all...]
  /external/qemu/target-i386/
ops_sse_header.h 69 SSE_HELPER_B(psubb, FSUB)
70 SSE_HELPER_W(psubw, FSUB)
71 SSE_HELPER_L(psubl, FSUB)
72 SSE_HELPER_Q(psubq, FSUB)
ops_sse.h 334 #define FSUB(a, b) ((a) - (b))
367 SSE_HELPER_B(helper_psubb, FSUB)
368 SSE_HELPER_W(helper_psubw, FSUB)
369 SSE_HELPER_L(helper_psubl, FSUB)
370 SSE_HELPER_Q(helper_psubq, FSUB)
    [all...]
  /dalvik/dx/src/com/android/dx/cf/code/
ByteOps.java 129 public static final int FSUB = 0x66;
456 "66 - fsub;" +
BytecodeArray.java 620 case ByteOps.FSUB:
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 59 // Implements expansion for FNEG; falls back to UnrollVectorOp if FSUB
180 case ISD::FSUB:
585 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) {
587 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
SelectionDAGBuilder.cpp     [all...]
SelectionDAGDumper.cpp 177 case ISD::FSUB: return "fsub";
LegalizeFloatTypes.cpp 91 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
    [all...]
SelectionDAG.cpp     [all...]
LegalizeDAG.cpp     [all...]
DAGCombiner.cpp 413 !TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType()))
416 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
420 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
423 case ISD::FSUB:
427 // fold (fneg (fsub A, B)) -> (fsub B, A)
472 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
476 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
480 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
481 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType()
    [all...]
LegalizeVectorTypes.cpp 104 case ISD::FSUB:
537 case ISD::FSUB:
    [all...]
FastISel.cpp     [all...]
  /external/valgrind/main/none/tests/ppc32/
round.c 32 FADD, FSUB, FMUL, FDIV, FMADD,
43 "fadd", "fsub", "fmul", "fdiv", "fmadd", "fmsub", "fnmadd",
473 BINOP("fsub");
932 case FSUB:
1087 case FSUB:
1088 BINOP("fsub");
  /external/valgrind/main/none/tests/ppc64/
round.c 32 FADD, FSUB, FMUL, FDIV, FMADD,
43 "fadd", "fsub", "fmul", "fdiv", "fmadd", "fmsub", "fnmadd",
473 BINOP("fsub");
932 case FSUB:
1087 case FSUB:
1088 BINOP("fsub");
  /prebuilts/misc/common/asm/
asm-4.0.jar 
  /prebuilts/sdk/tools/lib/
asm-4.0.jar 
  /prebuilts/tools/common/asm-tools/
asm-3.3.1.jar 
asm-4.0.jar 
  /external/javassist/src/main/javassist/compiler/
CodeGen.java 935 '-', DSUB, FSUB, LSUB, ISUB,
    [all...]
  /external/javassist/src/main/javassist/bytecode/analysis/
Executor.java 324 case FSUB:
    [all...]
  /external/llvm/lib/Target/CellSPU/
SPUISelDAGToDAG.cpp 788 // (fneg (fsub (fmul R64FP:$rA, R64FP:$rB), R64FP:$rC))
790 if (Op0.getOpcode() == ISD::FSUB) {
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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