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    Searched refs:FramePtr (Results 1 - 13 of 13) sorted by null

  /external/llvm/lib/Target/X86/
X86FrameLowering.h 37 unsigned FramePtr) const;
X86RegisterInfo.h 49 /// FramePtr - X86 physical register used as frame ptr.
51 unsigned FramePtr;
X86FrameLowering.cpp 307 unsigned FramePtr) const {
360 if (HasFP && FramePtr == Reg)
498 unsigned FramePtr = RegInfo->getFrameRegister(MF);
544 if (DstReg != FramePtr || SrcReg != StackPtr)
651 unsigned FramePtr = RegInfo->getFrameRegister(MF);
741 .addReg(FramePtr, RegState::Kill)
761 // Change the rule for the FramePtr to be an "offset" rule.
763 MachineLocation FPSrc(FramePtr);
769 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
780 MachineLocation FPDst(FramePtr);
    [all...]
X86RegisterInfo.cpp 74 FramePtr = X86::RBP;
78 FramePtr = X86::EBP;
387 if (!MRI->canReserveReg(FramePtr))
415 if (Reg == FramePtr && TFI->hasFP(MF)) {
544 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
546 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
550 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr);
581 return TFI->hasFP(MF) ? FramePtr : StackPtr;
  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 60 unsigned FramePtr = RegInfo->getFrameRegister(MF);
92 if (Reg == FramePtr)
101 if (Reg == FramePtr)
135 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
217 unsigned FramePtr = RegInfo->getFrameRegister(MF);
245 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
253 .addReg(FramePtr));
ARMBaseRegisterInfo.h 80 /// FramePtr - ARM physical register used as frame ptr.
81 unsigned FramePtr;
ARMFrameLowering.cpp 148 unsigned FramePtr = RegInfo->getFrameRegister(MF);
181 if (Reg == FramePtr)
190 if (Reg == FramePtr)
223 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr)
361 unsigned FramePtr = RegInfo->getFrameRegister(MF);
392 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes,
404 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
414 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
418 .addReg(FramePtr));
    [all...]
ARMBaseRegisterInfo.cpp 59 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11),
97 Reserved.set(FramePtr);
127 if (FramePtr == Reg && TFI->hasFP(MF))
401 } else if (FramePtr == ARM::R7) {
406 } else { // FramePtr == ARM::R11
423 } else if (FramePtr == ARM::R7) {
428 } else { // FramePtr == ARM::R11
546 if (!MRI->canReserveReg(FramePtr))
584 return FramePtr;
    [all...]
ARMExpandPseudoInsts.cpp     [all...]
ARMAsmPrinter.cpp     [all...]
ARMFastISel.cpp     [all...]
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 182 unsigned FramePtr = XCore::R10;
183 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr)
189 MachineLocation SPDst(FramePtr);
223 unsigned FramePtr = XCore::R10;
225 .addReg(FramePtr);
  /external/llvm/lib/CodeGen/
SjLjEHPrepare.cpp 411 Value *FramePtr = Builder.CreateConstGEP2_32(JBufPtr, 0, 0, "jbuf_fp_gep");
414 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true);

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