/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | [all...] |
LegalizeDAG.cpp | 193 SmallVector<int, 8> NewMask; 198 NewMask.push_back(-1); 200 NewMask.push_back(Idx * NumEltsGrowth + j); 203 assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?"); 204 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?"); 205 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); [all...] |
LegalizeVectorTypes.cpp | [all...] |
DAGCombiner.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineSimplifyDemanded.cpp | 345 APInt NewMask = ~(LHSKnownOne & RHSKnownOne & DemandedMask); 348 ConstantInt::get(I->getType(), NewMask & AndRHS->getValue()); 353 ConstantInt::get(I->getType(), NewMask & XorRHS->getValue()); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 764 SDValue NewMask = DAG.getConstant(0xff, VT); 766 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); 777 InsertDAGNode(DAG, N, NewMask); 811 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, VT); 812 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, NewMask); 820 InsertDAGNode(DAG, N, NewMask); [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |