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  /external/valgrind/main/VEX/auxprogs/
genoffsets.c 118 // ppc32
119 GENOFFSET(PPC32,ppc32,GPR0);
120 GENOFFSET(PPC32,ppc32,GPR1);
121 GENOFFSET(PPC32,ppc32,GPR2);
122 GENOFFSET(PPC32,ppc32,GPR3);
123 GENOFFSET(PPC32,ppc32,GPR4)
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  /external/valgrind/main/coregrind/
pub_core_basics.h 97 } PPC32;
m_libcassert.c 97 (srP)->misc.PPC32.r_lr = lr; \
m_stacktrace.c 395 /* -----------------------ppc32/64 ---------------------- */
423 Addr lr = startRegs->misc.PPC32.r_lr;
514 slot is 2 words back from sp, whereas on ppc32-elf(?) it's
m_machine.c 40 #include "pub_core_libcsignal.h" // for ppc32 messing with SIGILL and SIGFPE
81 regs->misc.PPC32.r_lr
356 (2) from the AT_SYSINFO entries the kernel gave us (ppc32 cache
371 ppc32: initially: call VG_(machine_get_hwcaps)
417 /* For hwcaps detection on ppc32/64, s390x, and arm we'll need to do SIGILL
741 /* Find out which subset of the ppc32 instruction set is supported by
742 verifying whether various ppc32 instructions generate a SIGILL
756 since that's a no-op on all ppc32 platforms so far supported,
809 problem that happens on Debian 3.1 (ppc32), and probably
879 /* Same instruction set detection algorithm as for ppc32. *
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m_signals.c 350 (srP)->misc.PPC32.r_lr = (uc)->uc_regs->mc_gregs[VKI_PT_LNK]; \
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  /external/qemu/
ppc-dis.c     [all...]

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