| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /external/kernel-headers/original/asm-x86/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 319 ARM::R1, ARM::R3, ARM::R12,ARM::LR, ARM::R5, ARM::R7,
324 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6,
331 ARM::R1, ARM::R3, ARM::R12,ARM::LR, ARM::R5, ARM::R6,
336 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6,
343 ARM::R1, ARM::R3, ARM::R10,ARM::R12,ARM::LR, ARM::R5, ARM::R7,
348 ARM::R0, ARM::R2, ARM::R10,ARM::R12,ARM::LR, ARM::R4, ARM::R7,
355 ARM::R1, ARM::R3, ARM::R12,ARM::LR, ARM::R5, ARM::R7, ARM::R8,
360 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6, ARM::R8,
367 ARM::R1, ARM::R3, ARM::R12,ARM::LR, ARM::R5, ARM::R6, ARM::R8,
372 ARM::R0, ARM::R2, ARM::R12,ARM::LR, ARM::R4, ARM::R6, ARM::R8
[all...] |
| Thumb1RegisterInfo.cpp | 557 // the function, the offset will be negative. Use R12 instead since that's
561 .addReg(ARM::R12, RegState::Define)
565 // interference with R12 before then, however, we'll need to restore it
571 // If this instruction affects R12, adjust our restore point.
574 if (MO.isRegMask() && MO.clobbersPhysReg(ARM::R12)) {
582 if (MO.getReg() == ARM::R12) {
589 // Restore the register from R12
591 addReg(Reg, RegState::Define).addReg(ARM::R12, RegState::Kill));
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmLexer.cpp | 114 // ip -> r12
121 .Case("ip", ARM::R12)
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCBaseInfo.h | 43 case R12: case X12: case F12: case V12: case CR3LT: return 12;
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 575 Value *R11,*R12;
577 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) {
579 A = R11; D = R12;
580 } else if (R12 == L11 || R12 == L12 || R12 == L21 || R12 == L22) {
581 A = R12; D = R11;
586 } else if (match(R1, m_And(m_Value(R11), m_Value(R12)))) {
588 A = R11; D = R12; E = R2; ok = true
[all...] |
| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeBaseInfo.h | 117 case MBlaze::R12 : return 12;
181 case 12 : return MBlaze::R12;
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 91 case X86::ECX: case X86::R12: return 2;
115 case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B:
346 X86::R12, X86::R13, X86::R14, X86::R15
636 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
673 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
709 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
761 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
762 return X86::R12;
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-arm-linux.c | 150 SC2(ip,R12);
324 REST(ip,R12);
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 173 ENTRY(R12) \
191 ENTRY(R12) \
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerInterface.h | 50 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15,
58 LIST(R7), LIST(R8), LIST(R9), LIST(R10), LIST(R11), LIST(R12),
|
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 112 GENOFFSET(AMD64,amd64,R12);
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeFrameLowering.cpp | 247 // Build the prologue SWI for R3 - R12 if needed. Note that R11 must
249 for (unsigned r = MBlaze::R3; r <= MBlaze::R12; ++r) {
290 // Build the epilogue LWI for R3 - R12 if needed
291 for (unsigned r = MBlaze::R12, i = VFI.size(); r >= MBlaze::R3; --r) {
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.cpp | 237 case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B:
312 case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B:
|
