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    Searched refs:RegIdx (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/CodeGen/
SplitKit.h 275 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
277 /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
279 /// Edit.get(RegIdx). Each value is represented by a minimal live range at
281 /// of RegIdx in RegAssign.
293 /// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the
296 LiveRangeCalc &getLRCalc(unsigned RegIdx) {
297 return LRCalc[SpillMode != SM_Partition && RegIdx != 0];
300 /// defValue - define a value in RegIdx from ParentVNI at Idx.
305 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx);
307 /// forceRecompute - Force the live range of ParentVNI in RegIdx to b
    [all...]
SplitKit.cpp 372 VNInfo *SplitEditor::defValue(unsigned RegIdx,
378 LiveInterval *LI = Edit->get(RegIdx);
385 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
388 // This was the first time (RegIdx, ParentVNI) was mapped.
408 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
410 ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
423 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
428 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
435 LiveInterval *LI = Edit->get(RegIdx);
438 // so always begin RegIdx 0 early and all others late
    [all...]
LiveVariables.cpp 85 LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
86 assert(TargetRegisterInfo::isVirtualRegister(RegIdx) &&
88 VirtRegInfo.grow(RegIdx);
89 return VirtRegInfo[RegIdx];
  /external/llvm/include/llvm/CodeGen/
LiveVariables.h 278 VarInfo &getVarInfo(unsigned RegIdx);
  /external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp 543 unsigned RegIdx = TRI->getEncodingValue(MO.getReg());
544 RegIdx |= 1; //The odd register is also the higher-numbered one of a pair.
546 unsigned Reg = RC.getRegister(RegIdx);
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