| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 341 SELECT_CC,
495 /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
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| SelectionDAG.h | 622 return getNode(ISD::SELECT_CC, DL, True.getValueType(),
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 60 /// SELECT_CC - Operand 0 and operand 1 are selection variable, operand 3
62 SELECT_CC,
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| MSP430ISelLowering.cpp | 116 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
117 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
191 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 95 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
512 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
590 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
611 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
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| LegalizeTypesGeneric.cpp | 480 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
482 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
|
| SelectionDAGDumper.cpp | 190 case ISD::SELECT_CC: return "select_cc";
|
| LegalizeVectorTypes.cpp | 63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
291 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
478 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
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| LegalizeDAG.cpp | [all...] |
| LegalizeVectorOps.cpp | 199 case ISD::SELECT_CC:
|
| LegalizeIntegerTypes.cpp | 69 case ISD::SELECT_CC: Res = PromoteIntRes_SELECT_CC(N); break;
505 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
775 case ISD::SELECT_CC: Res = PromoteIntOp_SELECT_CC(N, OpNo); break
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| DAGCombiner.cpp | 531 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
544 if (N.getOpcode() == ISD::SELECT_CC &&
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| SelectionDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 50 case MBlazeISD::Select_CC : return "MBlazeISD::Select_CC";
129 // Expand SELECT_CC
130 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
144 AddPromotedToType(ISD::SELECT_CC, MVT::i1, MVT::i32);
205 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
227 case MBlaze::Select_CC:
353 // To "insert" a SELECT_CC instruction, we actually have to insert the
581 Opc = MBlazeISD::Select_CC;
585 llvm_unreachable("Cannot lower select_cc with unknown type")
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| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 735 // Sparc has no select or setcc: expand to SELECT_CC.
751 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
752 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
753 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 87 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
94 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
177 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 166 // Custom lower SELECT_CC for most cases, but expand by default
167 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
168 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
169 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
170 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
171 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
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| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 155 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
156 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
202 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
800 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 177 // PowerPC wants to turn select_cc of FP into fsel when possible.
178 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
179 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 126 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
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| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 124 setOperationAction(ISD::SELECT_CC, VT, Expand);
550 setTargetDAGCombine(ISD::SELECT_CC);
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| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 373 setOperationAction(ISD::SELECT_CC , MVT::Other, Expand);
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