| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 188 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | 480 void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
|
| SelectionDAGDumper.cpp | 163 case ISD::UREM: return "urem";
|
| FastISel.cpp | 399 // Transform "urem x, pow2" -> "and x, pow2-1".
400 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) &&
[all...] |
| LegalizeVectorOps.cpp | 178 case ISD::UREM:
|
| LegalizeVectorTypes.cpp | 111 case ISD::UREM:
549 case ISD::UREM:
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 113 case ISD::UREM: Res = PromoteIntRes_UDIV(N); break;
[all...] |
| DAGCombiner.cpp | [all...] |
| TargetLowering.cpp | 642 case ISD::UREM:
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 179 setOperationAction(ISD::UREM, MVT::i8, Expand);
185 setOperationAction(ISD::UREM, MVT::i16, Expand);
191 setOperationAction(ISD::UREM, MVT::i32, Expand);
197 setOperationAction(ISD::UREM, MVT::i64, Expand);
203 setOperationAction(ISD::UREM, MVT::i128, Expand);
433 setOperationAction(ISD::UREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 156 setOperationAction(ISD::UREM, MVT::i8, Expand);
162 setOperationAction(ISD::UREM, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 101 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 719 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 116 // PowerPC has no SREM/UREM instructions
118 setOperationAction(ISD::UREM, MVT::i32, Expand);
120 setOperationAction(ISD::UREM, MVT::i64, Expand);
122 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
347 setOperationAction(ISD::UREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 193 setOperationAction(ISD::UREM, MVT::i32, Expand);
197 setOperationAction(ISD::UREM, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 147 setOperationAction(ISD::UREM, VT, Expand);
645 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 361 setOperationAction(ISD::UREM, VT, Expand);
727 setOperationAction(ISD::UREM, (MVT::SimpleValueType)VT, Expand);
[all...] |
