/external/llvm/lib/Target/Mips/ |
MipsMachineFunction.cpp | 43 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
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MipsISelDAGToDAG.cpp | 125 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 143 MF.getRegInfo().addLiveIn(Mips::T9_64); 182 MF.getRegInfo().addLiveIn(Mips::T9); 217 MF.getRegInfo().addLiveIn(Mips::V0); 264 MachineRegisterInfo *MRI = &MF.getRegInfo();
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/external/llvm/lib/CodeGen/ |
AllocationOrder.cpp | 29 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg); 31 VRM.getRegInfo().getRegAllocationHint(VirtReg);
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PHIEliminationUtils.cpp | 36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
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VirtRegMap.cpp | 52 MRI = &mf.getRegInfo(); 66 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); 94 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); 195 MRI = &MF->getRegInfo();
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RegAllocBase.cpp | 57 MRI = &vrm.getRegInfo();
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VirtRegMap.h | 85 MachineRegisterInfo &getRegInfo() const { return *MRI; }
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CalcSpillWeights.cpp | 47 MachineRegisterInfo &MRI = MF.getRegInfo(); 111 MachineRegisterInfo &mri = MF.getRegInfo();
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PHIElimination.cpp | 112 MRI = &MF.getRegInfo(); 238 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 239 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
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DeadMachineInstructionElim.cpp | 89 MRI = &MF.getRegInfo();
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LiveRegMatrix.cpp | 51 MRI = &MF.getRegInfo();
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OptimizePHIs.cpp | 64 MRI = &Fn.getRegInfo();
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ProcessImplicitDefs.cpp | 146 MRI = &MF.getRegInfo();
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Spiller.cpp | 67 mri = &mf.getRegInfo();
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MachineInstr.cpp | 59 MachineRegisterInfo &MRI = MF->getRegInfo(); 101 MachineRegisterInfo &MRI = MF->getRegInfo(); 121 MF->getRegInfo().removeRegOperandFromUseList(this); 137 RegInfo = &MF->getRegInfo(); 633 /// getRegInfo - If this instruction is embedded into a MachineFunction, 636 MachineRegisterInfo *MachineInstr::getRegInfo() { 638 return &MBB->getParent()->getRegInfo(); 667 MachineRegisterInfo *RegInfo = getRegInfo(); 758 MachineRegisterInfo *RegInfo = getRegInfo(); [all...] |
/dalvik/vm/compiler/codegen/ |
RallocUtil.cpp | 83 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg) 107 RegisterInfo *info1 = getRegInfo(cUnit, reg1); 108 RegisterInfo *info2 = getRegInfo(cUnit, reg2); 126 RegisterInfo *info = getRegInfo(cUnit, reg); 439 RegisterInfo *p = getRegInfo(cUnit, reg); 469 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 485 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 496 RegisterInfo *infoLo = getRegInfo(cUnit, rl.lowReg); 497 RegisterInfo *infoHi = getRegInfo(cUnit, rl.highReg); 527 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg) [all...] |
/dalvik/vm/compiler/codegen/mips/ |
RallocUtil.cpp | 85 static RegisterInfo *getRegInfo(CompilationUnit *cUnit, int reg) 109 RegisterInfo *info1 = getRegInfo(cUnit, reg1); 110 RegisterInfo *info2 = getRegInfo(cUnit, reg2); 128 RegisterInfo *info = getRegInfo(cUnit, reg); 505 RegisterInfo *p = getRegInfo(cUnit, reg); 535 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 551 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 562 RegisterInfo *infoLo = getRegInfo(cUnit, rl.lowReg); 563 RegisterInfo *infoHi = getRegInfo(cUnit, rl.highReg); 599 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCCTRLoops.cpp | 208 MRI = &MF.getRegInfo(); 636 MF->getRegInfo().getRegClass(TripCount->getReg()); 637 CountReg = MF->getRegInfo().createVirtualRegister(RC); 645 CountReg = MF->getRegInfo().createVirtualRegister(RC); 657 CountReg = MF->getRegInfo().createVirtualRegister(RC); 663 CountReg = MF->getRegInfo().createVirtualRegister(RC);
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PPCFrameLowering.cpp | 104 if (MF->getRegInfo().isPhysRegUsed(VRRegNo[i])) 110 I = MF->getRegInfo().livein_begin(), 111 E = MF->getRegInfo().livein_end(); I != E; ++I) { 117 I = MF->getRegInfo().liveout_begin(), 118 E = MF->getRegInfo().liveout_end(); I != E; ++I) { 732 MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR); 733 return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired(); 745 MF.getRegInfo().setPhysRegUnused(LR); [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUFrameLowering.cpp | 247 MF.getRegInfo().setPhysRegUnused(SPU::R0); 248 MF.getRegInfo().setPhysRegUnused(SPU::R1); 249 MF.getRegInfo().setPhysRegUnused(SPU::R2);
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/external/llvm/include/llvm/CodeGen/ |
LiveRangeEdit.h | 109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
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MachineFunction.h | 158 /// getRegInfo - Return information about the registers currently in use. 160 MachineRegisterInfo &getRegInfo() { return *RegInfo; } 161 const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
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/external/llvm/lib/Target/ARM/ |
ARMFrameLowering.cpp | 402 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) && 607 MF.getRegInfo().isLiveIn(Reg)) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonHardwareLoops.cpp | 230 MRI = &MF.getRegInfo(); 486 MF->getRegInfo().getRegClass(TripCount->getReg()); 487 unsigned CountReg = MF->getRegInfo().createVirtualRegister(RC); 492 CountReg = MF->getRegInfo().createVirtualRegister(RC);
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/external/llvm/lib/Target/X86/ |
X86VZeroUpper.cpp | 140 MachineRegisterInfo &MRI = MF.getRegInfo();
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