| /external/valgrind/main/none/tests/x86/ |
| insn_basic.def | 21 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
22 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
23 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
24 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
25 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
26 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
33 adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
34 adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
48 adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334
[all...] |
| gen_insn_test.pl | 405 elsif ($arg =~ /^(imm8|imm16|imm32)\[([^\]]+)\]$/)
|
| /external/valgrind/main/VEX/priv/ |
| guest_generic_x87.h | 108 UInt imm8, Bool isxSTRM );
|
| guest_generic_x87.c | 695 imm8 is the original immediate from the instruction. isSTRM
699 If the given imm8 case can be handled, the return value is True.
708 UInt imm8, Bool isxSTRM )
710 vassert(imm8 < 0x80);
714 /* Explicitly reject any imm8 values that haven't been validated,
717 switch (imm8) {
726 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format
727 UInt agg = (imm8 >> 2) & 3; // imm8[3:2] aggregation f
[all...] |
| host_arm_defs.h | 153 ARMam2_RI=3, /* reg +/- imm8 */
229 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */
239 UShort imm8; member in struct:__anon14651::__anon14652::__anon14653
249 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 );
284 /* imm8 = abcdefgh, B = NOT(b);
309 UInt imm8; member in struct:__anon14660
313 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
|
| guest_amd64_toIR.c | 8450 Int alen, imm8; local
14027 Int imm8; local
14080 Int imm8; local
14128 Int imm8; local
14183 Int imm8; local
14241 Int imm8; local
14300 Int imm8; local
14367 Int imm8; local
14452 Int imm8; local
14749 Int imm8; local
[all...] |
| guest_arm_toIR.c | 2596 UInt imm8 = SLICE_UInt(i1,7,0); local
10985 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
11001 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
12758 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); \/* 11:8, 3:0 *\/ local
13784 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); \/* 11:8, 3:0 *\/ local
15024 UInt imm8 = INSN0(7,0); local
15529 UInt imm8 = INSN0(7,0); local
15541 UInt imm8 = INSN0(7,0); local
15583 UInt imm8 = INSN0(7,0); local
15691 UInt imm8 = INSN0(7,0); local
16838 UInt imm8 = INSN1(7,0); local
17267 UInt imm8 = INSN1(7,0); local
17898 UInt imm8 = INSN1(7,0); local
17963 UInt imm8 = INSN1(7,0); local
18100 UInt imm8 = INSN1(7,0); local
[all...] |
| host_arm_defs.c | 437 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) {
440 ri84->ARMri84.I84.imm8 = imm8;
442 vassert(imm8 >= 0 && imm8 <= 255);
456 vex_printf("0x%x", ROR32(ri84->ARMri84.I84.imm8,
547 ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) {
550 i->imm8 = imm8;
556 ULong y, x = imm->imm8;
[all...] |
| guest_amd64_helpers.c | 2860 HWord imm8 = opc4_and_imm & 0xFF; local
[all...] |
| host_amd64_isel.c | 1896 IRExpr* imm8 = mi.bindee[2]; local
[all...] |
| /external/valgrind/main/none/tests/amd64/ |
| insn_mmx.def | 72 pslld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
75 psllq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x123456789abcdef0]
78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
81 psrad imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0xf89abcde]
84 psraw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0xf89a,0xfcde]
87 psrld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0x089abcde]
90 psrlq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x00123456789abcde]
93 psrlw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0x089a,0x0cde]
|
| pcmpstr64.c | 182 imm8 is the original immediate from the instruction. isSTRM
186 If the given imm8 case can be handled, the return value is True.
195 UInt imm8, Bool isSTRM )
197 assert(imm8 < 0x80);
201 /* Explicitly reject any imm8 values that haven't been validated,
204 switch (imm8) {
213 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format
214 UInt agg = (imm8 >> 2) & 3; // imm8[3:2] aggregation f
[all...] |
| gen_insn_test.pl | 428 elsif ($arg =~ /^(imm8|imm16|imm32|imm64)\[([^\]]+)\]$/)
|
| /external/v8/src/ia32/ |
| assembler-ia32.cc | 585 void Assembler::mov_b(const Operand& dst, int8_t imm8) {
589 EMIT(imm8);
819 void Assembler::cmpb(const Operand& op, int8_t imm8) {
827 EMIT(imm8);
1040 void Assembler::rcl(Register dst, uint8_t imm8) {
1042 ASSERT(is_uint5(imm8)); // illegal shift count
1043 if (imm8 == 1) {
1049 EMIT(imm8);
1054 void Assembler::rcr(Register dst, uint8_t imm8) {
1056 ASSERT(is_uint5(imm8)); // illegal shift coun
1181 uint8_t imm8 = imm.x_; local
[all...] |
| disasm-ia32.cc | 583 int imm8 = -1; local
598 imm8 = 1;
600 imm8 = *(data+2);
607 if (imm8 > 0) {
608 AppendToBuffer("%d", imm8);
1200 int8_t imm8 = static_cast<int8_t>(data[1]); local
1210 int8_t imm8 = static_cast<int8_t>(data[1]); local
1220 int8_t imm8 = static_cast<int8_t>(data[1]); local
1230 int8_t imm8 = static_cast<int8_t>(data[1]); local
1293 int8_t imm8 = static_cast<int8_t>(data[1]); local
1314 int8_t imm8 = static_cast<int8_t>(data[1]); local
[all...] |
| assembler-ia32.h | 693 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); }
694 void mov_b(const Operand& dst, int8_t imm8);
755 void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); }
756 void cmpb(const Operand& op, int8_t imm8);
805 void rcl(Register dst, uint8_t imm8);
806 void rcr(Register dst, uint8_t imm8);
808 void sar(Register dst, uint8_t imm8);
816 void shl(Register dst, uint8_t imm8);
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| SH4Assembler.h | 470 void addlImm8r(int imm8, RegisterID dst)
472 ASSERT((imm8 <= 127) && (imm8 >= -128));
474 uint16_t opc = getOpcodeGroup3(ADDIMM_OPCODE, dst, imm8);
484 void andlImm8r(int imm8, RegisterID dst)
486 ASSERT((imm8 <= 255) && (imm8 >= 0));
489 uint16_t opc = getOpcodeGroup5(ANDIMM_OPCODE, imm8);
517 void orlImm8r(int imm8, RegisterID dst)
519 ASSERT((imm8 <= 255) && (imm8 >= 0))
[all...] |
| /external/v8/src/x64/ |
| assembler-x64.h | 996 void rcl(Register dst, Immediate imm8) {
997 shift(dst, imm8, 0x2);
1000 void rol(Register dst, Immediate imm8) {
1001 shift(dst, imm8, 0x0);
1004 void rcr(Register dst, Immediate imm8) {
1005 shift(dst, imm8, 0x3);
1008 void ror(Register dst, Immediate imm8) {
1009 shift(dst, imm8, 0x1);
[all...] |
| disasm-x64.cc | 738 int imm8 = -1; local
773 imm8 = 1;
775 imm8 = *(data + 2);
786 AppendToBuffer("%d", imm8);
1028 AppendToBuffer("extractps "); // reg/m32, xmm, imm8
1034 // roundsd xmm, xmm/m64, imm8
[all...] |
| assembler-x64.cc | 1005 void Assembler::cmpb_al(Immediate imm8) {
1006 ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_));
1009 emit(imm8.value_);
[all...] |
| /external/qemu/ |
| arm-dis.c | 3369 unsigned int bits = 0, imm, imm8, mod; local
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| enc_tabl.cpp | 349 {OpcodeInfo::decoder, {opcode_starts_from + 4, ib}, {AL, imm8}, DU_U },\
354 {OpcodeInfo::all, {0x80, opc_ext, ib}, {r_m8, imm8}, def_use },\
[all...] |
| enc_prvt.h | 198 #define imm8 {OpndKind_Imm, OpndSize_8, OpndExt_Any, RegName_Null} macro
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.c | 1409 uint8_t imm8; local
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| Assemble.cpp | 2017 int imm8 = insn & 0xFF; local
[all...] |
