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    Searched refs:isSExt (Results 1 - 16 of 16) sorted by null

  /external/llvm/include/llvm/Target/
TargetCallingConv.h 57 bool isSExt() const { return Flags & SExt; }
TargetLowering.h     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp     [all...]
PPCISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMSelectionDAGInfo.cpp 166 Entry.isSExt = false;
178 Entry.isSExt = true;
ARMFastISel.cpp     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeTypes.cpp     [all...]
SelectionDAGBuilder.cpp 697 bool isSExt = true;
700 isSExt = true, FromVT = MVT::i1; // ASSERT SEXT 1
702 isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1
704 isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8
706 isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8
708 isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16
710 isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16
712 isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32
714 isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32
720 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl
    [all...]
LegalizeDAG.cpp     [all...]
LegalizeIntegerTypes.cpp     [all...]
SelectionDAG.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86FastISel.cpp 782 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
788 if (Outs[0].Flags.isSExt())
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 137 if (ArgFlags.isSExt())
212 if (ArgFlags.isSExt())
    [all...]
  /external/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp 499 else if (Outs[i].Flags.isSExt())
    [all...]
  /external/llvm/lib/Target/CellSPU/
SPUISelLowering.cpp 70 Entry.isSExt = isSigned;
    [all...]
  /external/llvm/lib/Target/Mips/
MipsISelLowering.cpp     [all...]

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