| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 432 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
483 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
573 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
637 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end())
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| Thumb2SizeReduction.cpp | 475 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
[all...] |
| ARMLoadStoreOptimizer.cpp | 787 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 146 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
148 MI->setMemRefs(b, e);
|
| MachineInstr.h | [all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 335 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
369 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
393 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
438 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
469 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
541 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
564 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
625 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
657 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1);
708 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 179 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 372 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 331 cast<MachineSDNode>(NVPTXLD)->setMemRefs(MemRefs0, MemRefs0 + 1);
520 cast<MachineSDNode>(NVPTXST)->setMemRefs(MemRefs0, MemRefs0 + 1);
|
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 370 NewMI->setMemRefs(LoadMI->memoperands_begin(),
|
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 159 MN->setMemRefs(Begin, End);
[all...] |
| InstrEmitter.cpp | 759 MI->setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(),
[all...] |
| SelectionDAGISel.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
