| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 782 unsigned Opcode = Instruction::UserOp1;
788 Opcode = I->getOpcode();
792 Opcode = C->getOpcode();
802 switch (Opcode) {
[all...] |
| ARMISelDAGToDAG.cpp | 204 /// 1, 2, 3 or 4. The opcode arrays specify the instructions used for
212 /// be 1, 2, 3 or 4. The opcode arrays specify the instructions used for
220 /// be 2, 3 or 4. The opcode arrays specify the instructions used for
227 /// should be 2, 3 or 4. The opcode array specifies the instructions used
300 // opcode and that it has a immediate integer right operand.
352 unsigned Opcode = MCID.getOpcode();
353 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
368 return TII->isFpMLxInstruction(Opcode);
719 unsigned Opcode = Op->getOpcode()
[all...] |
| ARMLoadStoreOptimizer.cpp | 94 int Offset, unsigned Base, bool BaseKill, int Opcode,
107 int Opcode,
114 int Opcode, unsigned Size,
137 static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) {
138 switch (Opcode) {
139 default: llvm_unreachable("Unhandled opcode!");
208 AMSubMode getLoadStoreMultipleSubMode(int Opcode) {
209 switch (Opcode) {
210 default: llvm_unreachable("Unhandled opcode!");
285 int Opcode, ARMCC::CondCodes Pred
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 180 // Get opcode and regclass of the output for the given load instruction.
238 // Get opcode and regclass of the output for the given store instruction.
322 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g.
341 unsigned Opcode = Instruction::UserOp1;
348 Opcode = I->getOpcode();
352 Opcode = C->getOpcode();
362 switch (Opcode) {
601 unsigned Opcode = Instruction::UserOp1;
603 Opcode = I->getOpcode();
606 Opcode = C->getOpcode()
[all...] |
| X86ISelDAGToDAG.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 42 getTargetNodeName(unsigned Opcode) const
44 switch (Opcode)
740 unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD :
743 SDValue Carry = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32),
747 SDValue Ignored = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32),
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 94 /// opcode and two operands into either a constant true or false, or a brand
106 /// opcode and two operands into either a FCmp instruction. isordered is passed
[all...] |
| InstructionCombining.cpp | 133 Instruction::BinaryOps Opcode = I.getOpcode();
134 if (Opcode != Instruction::Add &&
135 Opcode != Instruction::Sub) {
150 if (Opcode == Instruction::Add) {
181 Instruction::BinaryOps Opcode = I.getOpcode();
197 if (Op0 && Op0->getOpcode() == Opcode) {
203 if (Value *V = SimplifyBinOp(Opcode, B, C, TD)) {
226 if (Op1 && Op1->getOpcode() == Opcode) {
232 if (Value *V = SimplifyBinOp(Opcode, A, B, TD)) {
248 if (Op0 && Op0->getOpcode() == Opcode) {
[all...] |
| /dalvik/libdex/ |
| DexOpcodes.h | 18 * Dalvik opcode information.
21 * automatically by the opcode-gen tool. Any edits to the generated
24 * See the file opcode-gen/README.txt for information about updating
34 * kMaxOpcodeValue: the highest possible raw (unpacked) opcode value
36 * kNumPackedOpcodes: the highest possible packed opcode value of a
37 * valid Dalvik opcode, plus one
42 // BEGIN(libdex-maximum-values); GENERATED AUTOMATICALLY BY opcode-gen
45 // END(libdex-maximum-values); GENERATED AUTOMATICALLY BY opcode-gen
58 * associated with each is the corresponding packed opcode number.
59 * This is different than the opcode value from the Dalvik bytecod
[all...] |
| /external/llvm/bindings/ocaml/llvm/ |
| llvm.ml | 137 module Opcode = struct
229 | Instruction of Opcode.t
382 external constexpr_opcode : llvalue -> Opcode.t = "llvm_constexpr_get_opcode"
[all...] |
| llvm.mli | 187 module Opcode : sig
281 | Instruction of Opcode.t
668 val constexpr_opcode : llvalue -> Opcode.t
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 459 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB;
460 SDValue Res = DAG.getNode(Opcode, dl, NVT, LHS, RHS);
622 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
623 SDValue Res = DAG.getNode(Opcode, dl, NVT, LHS, RHS);
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/ |
| Opcode.java | 35 public enum Opcode
37 NOP((byte)0x00, "nop", ReferenceType.none, Format.Format10x, Opcode.CAN_CONTINUE),
38 MOVE((byte)0x01, "move", ReferenceType.none, Format.Format12x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
39 MOVE_FROM16((byte)0x02, "move/from16", ReferenceType.none, Format.Format22x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
40 MOVE_16((byte)0x03, "move/16", ReferenceType.none, Format.Format32x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
41 MOVE_WIDE((byte)0x04, "move-wide", ReferenceType.none, Format.Format12x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER | Opcode.SETS_WIDE_REGISTER)
314 opcodesByName.put(opcode.name.hashCode(), opcode); typedefs
[all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 190 enum Opcode {
634 return static_cast<Opcode>(Bits(24, 21));
636 inline Opcode OpcodeField() const {
637 return static_cast<Opcode>(BitField(24, 21));
|
| lithium-arm.h | 186 virtual Opcode opcode() const { return LInstruction::k##type; } \
216 enum Opcode {
224 virtual Opcode opcode() const = 0;
228 bool Is##type() const { return opcode() == k##type; }
233 // an opcode.
1108 virtual Opcode opcode() const { return LInstruction::kArithmeticD; } function in class:v8::internal::LArithmeticD
1125 virtual Opcode opcode() const { return LInstruction::kArithmeticT; } function in class:v8::internal::LArithmeticT
[all...] |
| /external/v8/src/ia32/ |
| lithium-ia32.h | 181 virtual Opcode opcode() const { return LInstruction::k##type; } \
211 enum Opcode {
219 virtual Opcode opcode() const = 0;
223 bool Is##type() const { return opcode() == k##type; }
228 // an opcode.
1109 virtual Opcode opcode() const { return LInstruction::kArithmeticD; } function in class:v8::internal::LArithmeticD
1130 virtual Opcode opcode() const { return LInstruction::kArithmeticT; } function in class:v8::internal::LArithmeticT
[all...] |
| /external/v8/src/mips/ |
| lithium-mips.h | 185 virtual Opcode opcode() const { return LInstruction::k##type; } \
215 enum Opcode {
223 virtual Opcode opcode() const = 0;
227 bool Is##type() const { return opcode() == k##type; }
232 // an opcode.
1088 virtual Opcode opcode() const { return LInstruction::kArithmeticD; } function in class:v8::internal::LArithmeticD
1105 virtual Opcode opcode() const { return LInstruction::kArithmeticT; function in class:v8::internal::LArithmeticT
[all...] |
| /external/v8/src/x64/ |
| lithium-x64.h | 186 virtual Opcode opcode() const { return LInstruction::k##type; } \
217 enum Opcode {
225 virtual Opcode opcode() const = 0;
229 bool Is##type() const { return opcode() == k##type; }
234 // an opcode.
1087 virtual Opcode opcode() const { return LInstruction::kArithmeticD; } function in class:v8::internal::LArithmeticD
1104 virtual Opcode opcode() const { return LInstruction::kArithmeticT; function in class:v8::internal::LArithmeticT
[all...] |
| /external/clang/lib/CodeGen/ |
| CGExprScalar.cpp | 47 BinaryOperator::Opcode Opcode; // Opcode of BinOp to perform
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 58 const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
59 switch (Opcode) {
834 // Get fp branch code (not opcode) from condition code.
[all...] |
| /external/clang/include/clang/AST/ |
| Expr.h | [all...] |
| /external/clang/lib/AST/ |
| ExprConstant.cpp | [all...] |
