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full:v128
(Results
301 - 325
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1007
) sorted by null
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/external/llvm/test/Analysis/BasicAA/
global-size.ll
5
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-
v128
:128:128"
must-and-partial.ll
7
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
no-escape-call.ll
3
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64-f80:128:128"
/external/llvm/test/Analysis/ScalarEvolution/
2009-05-09-PointerEdgeCount.ll
3
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-
v128
:128:128"
trip-count11.ll
3
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
/external/llvm/test/Assembler/
2010-02-05-FunctionLocalMetadataBecomesNull.ll
3
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
/external/llvm/test/CodeGen/ARM/
2009-08-26-ScalarToVector.ll
2
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-
v128
:128:128-a0:0:32"
2010-06-29-PartialRedefFastAlloc.ll
2
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-
v128
:32:128-a0:0:32-n32"
2011-04-07-schediv.ll
4
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-
v128
:32:128-a0:0:32-n32"
2012-01-26-CoalescerBug.ll
3
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:64:128-a0:0:64-n32-S64"
2012-02-01-CoalescerBug.ll
4
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:64:128-a0:0:64-n32-S64"
2012-04-10-DAGCombine.ll
2
;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:64:128-a0:0:64-n32-S64"
cse-call.ll
2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-
v128
:32:128-a0:0:32-n32-S32"
fp16.ll
3
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64-n32"
/external/llvm/test/CodeGen/CellSPU/
call.ll
3
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-
v128
:128:128-s0:128:128"
fneg-fabs.ll
6
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-
v128
:128:128-s0:128:128"
int2fp.ll
10
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-
v128
:128:128-s0:128:128"
/external/llvm/test/CodeGen/Mips/
2008-07-15-SmallSection.ll
15
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64"
2008-07-23-fpcmp.ll
9
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-
v128
:128:128-a0:0:64"
/external/llvm/test/CodeGen/PowerPC/
2007-04-30-InlineAsmEarlyClobber.ll
10
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64"
2007-05-14-InlineAsmSelectCrash.ll
2
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64"
2009-08-17-inline-asm-addr-mode-breakage.ll
3
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64-f128:64:128"
2010-02-12-saveCR.ll
3
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64-f128:64:128-n32"
cr1eq-no-extra-moves.ll
2
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-
v128
:128:128-n32"
lsr-postinc-pos.ll
10
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-
v128
:128:128-a0:0:64-f128:64:128-n32"
Completed in 243 milliseconds
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