/external/compiler-rt/lib/arm/ |
softfloat-alias.list | 3 # aliased to the *vfp functions on arm processors
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/external/valgrind/main/drd/scripts/ |
run-splash2-water-input | 4 # processors.
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/external/kernel-headers/original/asm-mips/ |
cpu.h | 21 I don't have docs for all the previous processors, but my impression is 22 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64 117 * Definitions for 7:0 on legacy processors 140 * Older processors used to encode processor version and revision in two 165 * R2000 class processors 171 * R6000 class processors 176 * R4000 class processors 186 * R8000 class processors 191 * TX3900 class processors 196 * MIPS32 class processors [all...] |
hazards.h | 94 * run fine on R2 processors. 209 * Finally the catchall case for all other processors including R4000, R4400, 213 * instructions on R4000 / R4400. Other processors only have a single cycle 215 * processors.
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/external/libyuv/files/include/libyuv/ |
cpu_id.h | 16 // These flags are only valid on x86 processors 20 // These flags are only valid on ARM processors
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
sysinfo.h | 33 /* Return number of configured processors. */ 36 /* Return number of available processors. */
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
sysinfo.h | 33 /* Return number of configured processors. */ 36 /* Return number of available processors. */
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
sysinfo.h | 33 /* Return number of configured processors. */ 36 /* Return number of available processors. */
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/external/llvm/lib/Support/ |
Host.cpp | 151 case 0: // Intel486 DX processors 152 case 1: // Intel486 DX processors 153 case 2: // Intel486 SX processors 154 case 3: // Intel487 processors, IntelDX2 OverDrive processors, 155 // IntelDX2 processors 157 case 5: // IntelSX2 processors 158 case 7: // Write-Back Enhanced IntelDX2 processors 159 case 8: // IntelDX4 OverDrive processors, IntelDX4 processors [all...] |
/sdk/eclipse/plugins/com.android.ide.eclipse.adt/src/com/android/ide/eclipse/adt/internal/editors/ |
AndroidSourceViewerConfig.java | 71 * Returns the content assist processors that will be used for content 77 * processors are applicable 83 ArrayList<IContentAssistProcessor> processors = new ArrayList<IContentAssistProcessor>(); local 92 processors.add(processor); 109 processors.add(new FilteringContentAssistProcessor(p)); 111 processors.add(p); 116 if (processors.size() > 0) { 117 return processors.toArray(new IContentAssistProcessor[processors.size()]);
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/cts/tests/tests/os/src/android/os/cts/ |
NoExecutePermissionTest.java | 74 // ARM processors before v7 do not have NX support. 79 // TODO: handle other processors. For now, assume those processors
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/external/llvm/lib/Target/ARM/ |
ARM.td | 60 // Some processors have FP multiply-accumulate instructions that don't 71 // Some processors benefit from using NEON instructions for scalar 84 /// processors. 89 // Some processors perform return stack prediction. CodeGen should avoid issue 126 // ARM Processors supported. 133 "Cortex-A8 ARM processors", 138 "Cortex-A9 ARM processors", 146 // V4 Processors. 155 // V4T Processors. 168 // V5T Processors [all...] |
/external/kernel-headers/original/linux/ |
threads.h | 11 * Maximum supported processors that can run under SMP. This value is
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smp.h | 52 * Call a function on all other processors 57 * Call a function on all processors
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node.h | 6 * definitions of processors.
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/external/markdown/docs/ |
release-2.0.txt | 28 * The various processors and patterns are now stored with OrderedDicts rather 29 than lists. Any code adding processors and/or patterns into Python-Markdown 31 * The various types of processors available have been either combined, added, 32 or removed. Ensure that your processors match the currently supported types.
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/hardware/ti/omap3/dspbridge/libbridge/inc/ |
perfutils.h | 4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
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qos_ti_uuid.h | 4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
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/external/chromium-trace/trace-viewer/third_party/pywebsocket/src/mod_pywebsocket/handshake/ |
hybi.py | 172 # Setup extension processors. 174 processors = [] 180 processors.append(processor) 181 self._request.ws_extension_processors = processors 183 # Extra handshake handler may modify/remove processors. 185 processors = filter(lambda processor: processor is not None, 193 for i, processor in enumerate(processors): 198 mux_processor = processors[mux_index] 199 logical_channel_processors = processors[:mux_index] 200 processors = processors[mux_index+1: [all...] |
/external/chromium/base/ |
sys_info_posix.cc | 30 // It seems that sysconf returns the number of "logical" processors on both 31 // Mac and Linux. So we get the number of "online logical" processors.
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/external/markdown/markdown/ |
postprocessors.py | 2 POST-PROCESSORS 5 Markdown also allows post-processors, which are similar to preprocessors in
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/external/compiler-rt/lib/ |
clear_cache.c | 28 * Intel processors have a unified instruction and data cache
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/external/icu4c/layout/ |
CharSubstitutionFilter.h | 18 * This filter is used by character-based GSUB processors. It
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/frameworks/compile/libbcc/runtime/lib/ |
clear_cache.c | 28 * Intel processors have a unified instruction and data cache
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/hardware/ti/omap3/dspbridge/inc/ |
_dbpriv.h | 20 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
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