| /external/stlport/src/ |
| lock_free_slist.h | 241 je L2 // Yes, we're done
246 L2:
268 je L2 // Yes, we're done
273 L2:
|
| /ndk/sources/cxx-stl/stlport/src/ |
| lock_free_slist.h | 241 je L2 // Yes, we're done
246 L2:
268 je L2 // Yes, we're done
273 L2:
|
| /bionic/libc/arch-x86/string/ |
| strcmp.S | 18 jmp L2 /* Jump into the loop! */
23 L2: movb (%eax),%cl
|
| strncmp.S | 21 jmp L2 /* Jump into the loop! */
27 L2: jz L4 /* strings are equal */
|
| /external/openssl/crypto/des/times/ |
| aix.cc | 7 L2 Cache : 256 K
|
| /external/llvm/include/llvm/ADT/ |
| ilist.h | 472 void transfer(iterator position, iplist &L2, iterator first, iterator last) {
480 NodeTy *L2Sentinel = L2.getTail();
481 L2.setTail(0);
489 L2.Head = Next;
507 this->transferNodesFromList(L2, First, PosNext);
510 L2.setTail(L2Sentinel);
552 void splice(iterator where, iplist &L2) {
553 if (!L2.empty())
554 transfer(where, L2, L2.begin(), L2.end())
[all...] |
| EquivalenceClasses.h | 217 member_iterator unionSets(member_iterator L1, member_iterator L2) {
218 assert(L1 != member_end() && L2 != member_end() && "Illegal inputs!");
219 if (L1 == L2) return L1; // Unifying the same two sets, noop.
222 // point to the L2 leader node.
223 const ECValue &L1LV = *L1.Node, &L2LV = *L2.Node;
229 // Clear L2's leader flag:
232 // L2's leader is now L1.
|
| /frameworks/av/media/libstagefright/codecs/avc/common/src/ |
| deblock.cpp | [all...] |
| /cts/tests/tests/renderscript/src/android/renderscript/cts/ |
| ComputeTest.java | 156 Long2 l2 = new Long2(); local
157 l2.x = 1;
158 l2.y = 2;
159 l2 = new Long2(1, 2);
160 assertTrue(l2.x == 1);
161 assertTrue(l2.y == 2);
590 Long2 L2 = s.get_u32_2();
591 if (L2.x != 1 || L2.y != 2) {
594 L2.x = 2
[all...] |
| /external/libffi/src/frv/ |
| eabi.S | 109 bne icc0, 0, .L2
114 .L2:
|
| /external/llvm/lib/VMCore/ |
| SymbolTableListTraitsImpl.h | 87 ::transferNodesFromList(ilist_traits<ValueSubClass> &L2,
91 ItemParentClass *NewIP = getListOwner(), *OldIP = L2.getListOwner();
|
| /external/qemu/distrib/sdl-1.2.15/src/hermes/ |
| mmxp2_32.asm | 73 jmp .L2
106 .L2:
137 jmp .L2 ; not necessary at the moment, but doesn't hurt (much)
170 .L2:
204 jmp .L2
241 .L2:
288 jmp near .L2
363 jz .L2
367 .L2:
|
| /external/clang/test/Sema/ |
| statements.c | 19 int test5() { return ({L1: L2: L3: 5;}); }
|
| /external/llvm/include/llvm/ |
| SymbolTableListTraits.h | 66 void transferNodesFromList(ilist_traits<ValueSubClass> &L2,
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 10 L2:
|
| x86_64-symbols.s | 10 L2:
|
| /external/oprofile/events/x86-64/family11h/ |
| events | 41 event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_SYSTEM : Data cache refills from L2 or system
44 event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits
45 event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses
53 # L2 Cache and System Interface events
59 event:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 cache
60 event:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses
61 event:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback
66 event:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2
68 event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit
69 event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB mis
[all...] |
| /external/oprofile/events/x86-64/hammer/ |
| events | 41 event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_SYSTEM : Data cache refills from L2 or system
44 event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits
45 event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses
53 # L2 Cache and System Interface events
59 event:0x7d counters:0,1,2,3 um:l2_internal minimum:500 name:REQUESTS_TO_L2 : Requests to L2 cache
60 event:0x7e counters:0,1,2,3 um:l2_req_miss minimum:500 name:L2_CACHE_MISS : L2 cache misses
61 event:0x7f counters:0,1,2,3 um:l2_fill minimum:500 name:L2_CACHE_FILL_WRITEBACK : L2 fill/writeback
66 event:0x82 counters:0,1,2,3 um:zero minimum:500 name:INSTRUCTION_CACHE_REFILLS_FROM_L2 : Instruction cache refills from L2
68 event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit
69 event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB mis
[all...] |
| /external/libpcap/ |
| tokdefs.h | 99 L2 = 325,
203 #define L2 325
|
| /external/valgrind/main/coregrind/m_dispatch/ |
| dispatch-x86-darwin.S | 256 jz L2
263 L2: /* otherwise we're OK */
|
| dispatch-x86-linux.S | 250 jz L2
257 L2: /* otherwise we're OK */
|
| /external/checkpolicy/ |
| policy_scan.l | 218 l2 |
219 L2 { return(L2); }
|
| /external/libselinux/src/ |
| label_android_property.c | 42 size_t L2 = strlen(sp2->property_key);
44 return (L1 < L2) - (L1 > L2);
|
| /external/qemu/distrib/sdl-1.2.15/src/stdlib/ |
| SDL_stdlib.c | 148 jge L2
156 L2:
227 jmp L2
258 L2:
283 jge L2
290 L2:
361 jmp L2
395 L2:
422 jge L2
430 L2
[all...] |
| /external/opencv/cv/src/ |
| cvoptflowlk.cpp | 285 int L2 = i;
301 Line2 = L2 * imgStep;
309 GradX = ConvX - MemX[1][L2];
312 MemX[1][L2] = ConvX;
329 GradX = ConvX - MemX[(j - 1) & 1][L2];
332 MemX[(j - 1) & 1][L2] = ConvX;
353 GradX = ConvX - MemX[(imageWidth - 2) & 1][L2];
|
