| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 178 GCModuleInfo *MI = getAnalysisIfAvailable<GCModuleInfo>();
179 assert(MI && "AsmPrinter didn't require GCModuleInfo?");
180 for (GCModuleInfo::iterator I = MI->begin(), E = MI->end(); I != E; ++I)
495 static void emitComments(const MachineInstr &MI, raw_ostream &CommentOS) {
496 const MachineFunction *MF = MI.getParent()->getParent();
507 if (TM.getInstrInfo()->isLoadFromStackSlotPostFE(&MI, FI)) {
509 MMO = *MI.memoperands_begin();
512 } else if (TM.getInstrInfo()->hasLoadFromStackSlot(&MI, MMO, FI)) {
515 } else if (TM.getInstrInfo()->isStoreToStackSlotPostFE(&MI, FI))
[all...] |
| DwarfException.cpp | 187 bool DwarfException::CallToNoUnwindFunction(const MachineInstr *MI) {
188 assert(MI->isCall() && "This should be a call instruction!");
193 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
194 const MachineOperand &MO = MI->getOperand(I);
244 for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
245 MI != E; ++MI) {
246 if (!MI->isLabel()) {
247 if (MI->isCall())
248 SawPotentiallyThrowing |= !CallToNoUnwindFunction(MI);
[all...] |
| DwarfException.h | 89 bool CallToNoUnwindFunction(const MachineInstr *MI);
|
| /external/clang/lib/Lex/ |
| PreprocessingRecord.cpp | 348 MacroDefinition *PreprocessingRecord::findMacroDefinition(const MacroInfo *MI) {
350 = MacroDefinitions.find(MI);
360 void PreprocessingRecord::MacroExpands(const Token &Id, const MacroInfo* MI,
366 if (MI->isBuiltinMacro())
369 else if (MacroDefinition *Def = findMacroDefinition(MI))
375 const MacroInfo *MI) {
376 SourceRange R(MI->getDefinitionLoc(), MI->getDefinitionEndLoc());
379 MacroDefinitions[MI] = addPreprocessedEntity(Def);
383 const MacroInfo *MI) {
[all...] |
| /external/clang/lib/Parse/ |
| ParseCXXInlineMethods.cpp | 190 LateParsedMemberInitializer *MI =
192 getCurrentClass().LateParsedDeclarations.push_back(MI);
193 CachedTokens &Toks = MI->Toks;
484 void Parser::ParseLexedMemberInitializer(LateParsedMemberInitializer &MI) {
485 if (!MI.Field || MI.Field->isInvalidDecl())
490 MI.Toks.push_back(Tok);
491 PP.EnterTokenStream(MI.Toks.data(), MI.Toks.size(), true, false);
498 ExprResult Init = ParseCXXMemberInitializer(MI.Field, /*IsFunction=*/false,
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegisterPressure.cpp | 336 static void collectOperands(const MachineInstr *MI,
341 for(ConstMIBundleOperands OperI(MI); OperI.isValid(); ++OperI) {
665 void RegPressureTracker::bumpUpwardPressure(const MachineInstr *MI) {
669 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, RCI);
707 getMaxUpwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta,
716 bumpUpwardPressure(MI);
737 const MachineInstr* MI = &*UI;
738 SlotIndex InstSlot = LIS->getInstructionIndex(MI).getRegSlot();
751 void RegPressureTracker::bumpDownwardPressure(const MachineInstr *MI) {
755 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, RCI)
[all...] |
| MachineBasicBlock.cpp | 90 /// addNodeToList (MI) - When we add an instruction to a basic block
105 /// removeNodeFromList (MI) - When we remove an instruction from a basic block
120 /// transferNodesFromList (MI) - When moving a range of instructions from one
139 void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
140 assert(!MI->getParent() && "MI is still in a block!");
141 Parent->getParent()->DeleteMachineInstr(MI);
148 assert(!I->isInsideBundle() && "First non-phi MI cannot be inside a bundle!");
565 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(),
566 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI
[all...] |
| StackColoring.cpp | 239 MachineOperand &MI = BI->getOperand(0);
240 unsigned Slot = MI.getIndex();
369 MachineInstr *MI = *it;
370 if (MI->getParent() != MBB)
373 assert((MI->getOpcode() == TargetOpcode::LIFETIME_START ||
374 MI->getOpcode() == TargetOpcode::LIFETIME_END) &&
377 bool IsStart = MI->getOpcode() == TargetOpcode::LIFETIME_START;
378 MachineOperand &Mo = MI->getOperand(0);
382 SlotIndex ThisIndex = Indexes->getInstructionIndex(MI);
|
| MachineScheduler.cpp | 254 DEBUG(dbgs() << "********** MI Scheduling **********\n");
410 /// getNumMicroOps - Return the number of issue slots required for this MI.
411 unsigned getNumMicroOps(MachineInstr *MI) const {
413 int UOps = InstrItins->getNumMicroOps(MI->getDesc().getSchedClass());
414 return (UOps >= 0) ? UOps : TII->getNumMicroOps(InstrItins, MI);
421 void moveInstruction(MachineInstr *MI, MachineBasicBlock::iterator InsertPos);
491 void ScheduleDAGMI::moveInstruction(MachineInstr *MI,
494 if (&*RegionBegin == MI)
498 BB->splice(InsertPos, BB, MI);
501 LIS->handleMove(MI);
[all...] |
| PrologEpilogInserter.cpp | 762 MachineInstr *MI = I;
764 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
765 if (MI->getOperand(i).isFI()) {
779 TRI.eliminateFrameIndex(MI, SPAdj,
788 MI = 0;
795 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
828 MachineInstr *MI = I;
829 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
830 if (MI->getOperand(i).isReg())
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/clang/lib/ARCMigrate/ |
| TransEmptyStatementsAndDealloc.cpp | 214 MI = I->instmeth_begin(),
215 ME = I->instmeth_end(); MI != ME; ++MI) {
216 ObjCMethodDecl *MD = *MI;
|
| /external/clang/lib/Basic/ |
| Module.cpp | 223 for (submodule_const_iterator MI = submodule_begin(), MIEnd = submodule_end();
224 MI != MIEnd; ++MI)
225 (*MI)->print(OS, Indent + 2);
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMBaseInfo.h | 34 MI, // Minus, negative Less than
54 case MI: return PL;
55 case PL: return MI;
74 case ARMCC::MI: return "mi";
|
| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 66 MachineBasicBlock::iterator MI,
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 57 virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
|
| NVPTXAsmPrinter.cpp | 209 void NVPTXAsmPrinter::emitLineNumberAsDotLoc(const MachineInstr &MI)
213 if (ignoreLoc(MI))
216 DebugLoc curLoc = MI.getDebugLoc();
230 const MachineFunction *MF = MI.getParent()->getParent();
261 void NVPTXAsmPrinter::EmitInstruction(const MachineInstr *MI) {
265 emitLineNumberAsDotLoc(*MI);
266 printInstruction(MI, OS);
522 void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
524 const MachineOperand &MO = MI->getOperand(opNum);
589 printImplicitDef(const MachineInstr *MI, raw_ostream &O) const
[all...] |
| /external/llvm/tools/bugpoint/ |
| CrashDebugger.cpp | 400 for (Module::iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI)
401 for (Function::iterator FI = MI->begin(), FE = MI->end(); FI != FE; ++FI)
531 for (Module::const_iterator MI = BD.getProgram()->begin(),
532 ME = BD.getProgram()->end(); MI != ME; ++MI)
533 for (Function::const_iterator FI = MI->begin(), FE = MI->end(); FI != FE
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 681 virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
690 virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
712 virtual bool isFrameOffsetLegal(const MachineInstr *MI,
727 MachineBasicBlock::iterator MI) const {
753 virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 406 DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
431 DecodeStatus result = decodeInstruction(DecoderTableARM32, MI, insn,
440 MI.clear();
441 result = decodeInstruction(DecoderTableVFP32, MI, insn, Address, this, STI);
447 MI.clear();
448 result = decodeInstruction(DecoderTableNEONData32, MI, insn, Address,
454 if (!DecodePredicateOperand(MI, 0xE, Address, this))
459 MI.clear();
460 result = decodeInstruction(DecoderTableNEONLoadStore32, MI, insn, Address,
466 if (!DecodePredicateOperand(MI, 0xE, Address, this)
[all...] |
| /external/llvm/utils/TableGen/ |
| FastISelEmitter.cpp | 809 std::map<OperandsSignature, std::vector<OperandsSignature> >::iterator MI
811 if (MI != SignaturesWithConstantForms.end()) {
813 std::sort(MI->second.begin(), MI->second.end());
814 MI->second.erase(std::unique(MI->second.begin(), MI->second.end()),
815 MI->second.end());
820 for (unsigned i = 0, e = MI->second.size(); i != e; ++i) {
822 MI->second[i].emitImmediatePredicate(OS, ImmediatePredicates)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 62 // the first MI in a bundle)
162 /// getFlags - Return the MI flags bitvector.
167 /// getFlag - Return whether an MI flag is set.
172 /// setFlag - Set a MI flag.
181 /// clearFlag - Clear a MI flag.
186 /// isInsideBundle - Return true if MI is in a bundle (but not the first MI
191 /// | MI |
195 /// | MI * |
199 /// | MI * |
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| ScalarReplAggregates.cpp | 177 void RewriteMemIntrinUserOfAlloca(MemIntrinsic *MI, Instruction *Inst,
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.cpp | 1 //===- HexagonMachineScheduler.cpp - MI Scheduler for Hexagon -------------===//
116 void VLIWMachineScheduler::moveInstruction(MachineInstr *MI,
119 if (&*RegionBegin == MI)
123 BB->splice(InsertPos, BB, MI);
126 LIS->handleMove(MI);
130 RegionBegin = MI;
340 << "********** MI Converging Scheduling VLIW BB#" << BB->getNumber()
392 MachineInstr *MI = SU->getInstr();
396 if (&*CurrentTop == MI)
399 moveInstruction(MI, CurrentTop)
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 197 inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
198 MI.print(OS, 0);
|
