| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 466 SUB yMask, yMask, #2
670 SUB dstStep, dstStep, #4
|
| /external/v8/src/arm/ |
| constants-arm.h | 193 SUB = 2 << 21, // Subtract.
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 70 @ CHECK: sub sp, #8 @ encoding: [0x82,0xb0]
71 @ CHECK: sub sp, #8 @ encoding: [0x82,0xb0]
571 @ SUB (immediate)
583 @ SUB (SP minus immediate)
585 sub sp, #12
586 sub sp, sp, #508
588 @ CHECK: sub sp, #12 @ encoding: [0x83,0xb0]
589 @ CHECK: sub sp, #508 @ encoding: [0xff,0xb0]
593 @ SUB (register)
|
| /external/v8/src/ |
| ast.cc | 144 case Token::ASSIGN_SUB: return Token::SUB;
278 case Token::SUB:
299 case Token::SUB:
[all...] |
| builtins.h | 231 V(SUB, 1) \
|
| /external/webkit/Source/JavaScriptCore/assembler/ |
| ARMAssembler.h | 127 SUB = (0x2 << 21),
303 emitInst(static_cast<ARMWord>(cc) | SUB, rd, rn, op2);
308 emitInst(static_cast<ARMWord>(cc) | SUB | SET_CC, rd, rn, op2);
|
| /external/v8/src/ia32/ |
| code-stubs-ia32.cc | 526 __ sub(esp, Immediate(kDoubleSize * XMMRegister::kNumRegisters));
693 __ sub(esp, Immediate(sizeof(uint64_t))); // Nolint.
756 __ sub(scratch2, Immediate(zero_exponent));
763 __ sub(ecx, scratch2);
795 __ sub(ecx, scratch2);
854 case Token::SUB:
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_IDCT_s.h | 438 SUB pSrc, pDest, #(64*2)
496 SUB pSrc, pDest, #(64*2)
[all...] |
| armCOMM_s.h | 488 SUB $_base, $_base, $_offset
649 _M_OPC SUB, sp, sp, _SBytes
827 SUB sp, sp, #16
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_IDCT_s.h | 444 SUB pSrc, pDest, #(64*2)
502 SUB pSrc, pDest, #(64*2)
[all...] |
| armCOMM_s.h | 491 SUB $_base, $_base, $_offset
652 _M_OPC SUB, sp, sp, _SBytes
830 SUB sp, sp, #16
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 442 if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB &&
464 if (N.getOpcode() == ISD::SUB)
497 AddSub = ARM_AM::sub;
512 if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB &&
526 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add;
552 if (N.getOpcode() != ISD::SUB && ShOpcVal == ARM_AM::no_shift &&
595 AddSub = ARM_AM::sub;
610 if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB &&
630 if (N.getOpcode() != ISD::SUB) {
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 278 setOperationAction(ISD::SUB, MVT::i8, Custom);
279 setOperationAction(ISD::SUB, MVT::i64, Legal);
416 // add/sub are legal for all supported vector VT's.
418 setOperationAction(ISD::SUB, VT, Legal);
719 DAG.getNode(ISD::SUB, dl, MVT::i32,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 363 // Add/Sub overflow ops with MVT::Glues are lowered to EFLAGS dependences.
477 // 64-bit addm sub, shl, sra, srl (iff 32-bit x86)
717 setOperationAction(ISD::SUB , (MVT::SimpleValueType)VT, Expand);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 98 setOperationAction(ISD::SUB, MVT::i64, Custom);
184 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG);
202 case ISD::SUB:
718 (N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 106 case ISD::SUB:
142 // If the result is null then the sub-method took care of registering it.
317 return DAG.getNode(ISD::SUB, dl, NVT, Op,
459 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB;
622 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
[all...] |
| TargetLowering.cpp | [all...] |
| /external/webkit/Source/WebCore/rendering/ |
| RenderTableSection.cpp | 409 if (va == BASELINE || va == TEXT_BOTTOM || va == TEXT_TOP || va == SUPER || va == SUB) {
662 if (va == BASELINE || va == TEXT_BOTTOM || va == TEXT_TOP || va == SUPER || va == SUB) {
675 case SUB:
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 431 case ISD::SUB:
|
| /external/v8/src/mips/ |
| constants-mips.h | 327 SUB = ((4 << 3) + 2),
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Filt_6k_7k_opt.s | 36 SUB r13, r13, #240 @ x[L_SUBFR16k + (L_FIR - 1)]
|
| residu_asm_opt.s | 215 SUB r14, r14, #0x10000
|
| syn_filt_opt.s | 37 SUB r13, r13, #700 @ y_buf[L_FRAME16k + M16k]
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Filt_6k_7k_neon.s | 35 SUB r13, r13, #240 @ x[L_SUBFR16k + (L_FIR - 1)]
|
| /frameworks/av/media/libstagefright/codecs/avc/enc/src/ |
| sad_inline.h | 216 SUB src1, src1, x7, asr #7; /* add 0xFF to the negative byte, add back carry */
385 "SUB %0, %0, %1, asr #7\n\t"
|
