| /external/llvm/test/CodeGen/Mips/ |
| o32_cc.ll | 51 ; CHECK: addiu $4, $zero, 12
52 ; CHECK: addiu $5, $zero, 13
53 ; CHECK: addiu $6, $zero, 14
54 ; CHECK: addiu $7, $zero, 15
67 ; CHECK: addiu $6, $zero, 23
78 ; CHECK: addiu $6, $zero, 33
79 ; CHECK: addiu $7, $zero, 24
90 ; CHECK: addiu $5, $zero, 43
91 ; CHECK: addiu $6, $zero, 34
103 ; CHECK: addiu $4, $zero, 2
[all...] |
| stacksize.ll | 6 ; CHECK-NOT: addiu $sp, $sp
|
| imm.ll | 22 ; CHECK: addiu ${{[0-9]+}}, $zero, 4660
29 ; CHECK: addiu ${{[0-9]+}}, $zero, -32204
|
| tls.ll | 20 ; PIC: addiu $4, $[[R0]], %tlsgd(t1)
26 ; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
43 ; PIC: addiu $4, $[[R0]], %tlsgd(t2)
48 ; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
51 ; STATIC: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
64 ; PIC: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
|
| o32_cc_vararg.ll | 31 ; CHECK: addiu $sp, $sp, -16
57 ; CHECK: addiu $sp, $sp, -16
61 ; CHECK: addiu $[[R0:[0-9]+]], $sp, 20
62 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7
63 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8
85 ; CHECK: addiu $sp, $sp, -16
108 ; CHECK: addiu $sp, $sp, -24
111 ; CHECK: addiu ${{[0-9]+}}, $sp, 32
136 ; CHECK: addiu $sp, $sp, -24
162 ; CHECK: addiu $sp, $sp, -2
[all...] |
| blockaddr.ll | 16 ; PIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp[[T0]])
18 ; PIC-O32: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp[[T1]])
20 ; STATIC-O32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]])
22 ; STATIC-O32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]])
24 ; PIC-N32: addiu ${{[0-9]+}}, $[[R0]], %got_ofst($tmp[[T0]])
26 ; PIC-N32: addiu ${{[0-9]+}}, $[[R1]], %got_ofst($tmp[[T1]])
28 ; STATIC-N32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]])
30 ; STATIC-N32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]])
|
| global-pointer-reg.ll | 14 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
|
| inlineasmmemop.ll | 7 ; CHECK: addiu $[[T0:[0-9]+]], $sp
|
| mips64ext.ll | 5 ; CHECK: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, 2
|
| sub1.ll | 10 ; 16: addiu ${{[0-9]+}}, -{{[0-9]+}}
|
| cmov.ll | 9 ; O32: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
26 ; O32: addiu $[[R1:[0-9]+]], ${{[a-z0-9]+}}, %got(d)
27 ; O32: addiu $[[R0:[0-9]+]], ${{[a-z0-9]+}}, %got(c)
|
| helloworld.ll | 20 ; PE: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
24 ; C1: addiu ${{[0-9]+}}, %lo($.str)
|
| internalfunc.ll | 10 ; CHECK: addiu $25, $[[R0]], %lo(f2)
29 ; CHECK: addiu ${{[0-9]+}}, $[[R2]], %lo(sf2)
|
| largeimmprinting.ll | 10 ; CHECK: addiu $at, $at, -16
|
| longbranch.ll | 10 ; O32: addiu $at, $at, {{[0-9]+}}
|
| /external/kernel-headers/original/asm-mips/ |
| string.h | 31 "addiu\t%1,1\n\t"
34 "addiu\t%0,1\n\t"
59 "addiu\t%0,1\n\t"
61 "addiu\t%1,1\n"
82 "addiu\t%0,1\n\t"
84 "addiu\t%1,1\n\t"
116 "addiu\t%0,1\n\t"
118 "addiu\t%1,1\n"
|
| div64.h | 44 " addiu %4, %4, -1\n\t" \
46 "addiu %2, %2, 1\n" \
|
| /external/llvm/lib/Target/Mips/ |
| MipsAnalyzeImmediate.cpp | 32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL));
56 // A single ADDiu will do if RemSize <= 16.
58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
71 // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
79 // Replace a ADDiu & SLL pair with a LUi.
81 // ADDiu 0x0111
86 // Check if the first two instructions are ADDiu and SLL and the shift amount
88 if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) ||
92 // Sign-extend and shift operand of ADDiu and see if it still fits in 16-bit.
130 ADDiu = Mips::ADDiu
[all...] |
| MipsAnalyzeImmediate.h | 26 /// instruction in the sequence must be an ADDiu if LastInstrIsADDiu is
35 /// GetInstSeqLsADDiu - Get instrucion sequences which end with an ADDiu to
50 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
58 unsigned ADDiu, ORi, SLL, LUi;
|
| MipsJITInfo.cpp | 64 // addiu t0, t0, low 16 bit of the NewAddr
109 "addiu $sp, $sp, -64\n"
129 "addiu $a0, $t8, -16\n"
142 "addiu $sp, $sp, 64\n"
145 "addiu $t8, $t8, -16\n"
172 // addiu $t9, $t9, %lo(NewVal)
222 // addiu t9, t9, %lo(EmittedAddr)
|
| /external/llvm/test/MC/Mips/ |
| mips-relocations.s | 7 # CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]
15 # CHECK: addiu $2, $2, %dtprel_hi(_gp_disp) # encoding: [A,A,0x42,0x24]
27 # CHECK: addiu $2, $2, %tprel_lo(_gp_disp) # encoding: [A,A,0x42,0x24]
31 addiu $2, $2, %lo(_gp_disp)
35 addiu $2, $2, %dtprel_hi(_gp_disp)
41 addiu $2, $2, %tprel_lo(_gp_disp)
|
| lea_64.ll | 10 ; CHECK-NOT: addiu {{[0-9,a-f]+}}, {{[0-9,a-f]+}}, {{[0-9]+}}
|
| /dalvik/vm/arch/mips/ |
| CallO32.S | 156 addiu $t0,4
157 addiu $a3,-1
164 addiu $t1,16 /* include space for a0/a1/a2/a3 */
166 addiu $t1,$sp,8
179 addiu $t0,4
180 addiu $a3,-1
182 addiu $t1,4
190 addiu $t0,4
191 addiu $a3,-1
194 addiu $t1,
[all...] |
| /bionic/libc/arch-mips/string/ |
| memcpy.S | 178 addiu a0,a0,64 # adding 64 to dest
181 addiu a1,a1,64 # adding 64 to src
201 addiu a1,a1,32
211 addiu a0,a0,32
222 addiu a1,a1,4
223 addiu a0,a0,4
233 addiu a1,a1,1
234 addiu a0,a0,1
343 addiu a0,a0,64 # adding 64 to dest
346 addiu a1,a1,64 # adding 64 to sr
[all...] |
| /development/ndk/platforms/android-9/arch-mips/src/ |
| crtbegin_static.S | 129 addiu $sp,$sp,-32
137 addiu $4,$2,%lo(__EH_FRAME_BEGIN__)
139 addiu $5,$2,%lo(object.1265)
149 addiu $sp,$sp,32
169 addiu $sp,$sp,-32
198 addiu $4,$2,%lo(__EH_FRAME_BEGIN__)
217 addiu $sp,$sp,32
|
