| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/comm/src/ |
| omxVCCOMM_Copy16x16_s.s | 46 LDRD X0,[pSrc],#8 ;//pSrc after loading pSrc=pSrc+8
47 LDRD X1,[pSrc],Count ;//pSrc after loading pSrc=pSrc+step
51 LDRD X0,[pSrc],#8
53 LDRD X1,[pSrc],Count
57 LDRD X0,[pSrc],#8
59 LDRD X1,[pSrc],Count
63 LDRD X0,[pSrc],#8
65 LDRD X1,[pSrc],Count
69 LDRD X0,[pSrc],#8
71 LDRD X1,[pSrc],Coun
[all...] |
| omxVCCOMM_Copy8x8_s.s | 45 LDRD X0,[pSrc],Count ;//pSrc after loading : pSrc=pSrc+step
46 LDRD X1,[pSrc],Count
49 LDRD X0,[pSrc],Count
51 LDRD X1,[pSrc],Count
54 LDRD X0,[pSrc],Count
56 LDRD X1,[pSrc],Count
59 LDRD X0,[pSrc],Count
61 LDRD X1,[pSrc],Count
|
| /ndk/tests/build/ssax-instructions/jni/ |
| test.S | 23 ldrd r4, [r0], ip label
24 ldrd r6, [r0], ip label
25 ldrd r8, [r0], ip label
26 ldrd sl, [r0], r3 label
44 ldrd r2, [sp, #8] label
53 ldrd r6, [sp] label
|
| /external/llvm/test/CodeGen/ARM/ |
| ldrd.ll | 9 ; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base
17 ; A8: ldrd r2, r3, [r2]
20 ; M3-NOT: ldrd
31 ; able to generate an LDRD pair here, but this is highly sensitive to
35 ; R0/R1/R2 live as the three arguments, forcing the LDRD's odd
36 ; destination into R3. We then sensibly split LDRD again rather then
42 ; BASIC: ldrd
46 ; GREEDY: ldrd
|
| memcpy-inline.ll | 3 ; CHECK: ldrd
|
| 2011-03-15-LdStMultipleBug.ll | 3 ; Do not form Thumb2 ldrd / strd if the offset is not multiple of 4.
13 ; CHECK-NOT: ldrd
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ldrd.ll | 7 ; CHECK: ldrd
|
| /system/core/libpixelflinger/ |
| rotate90CW_4x4_16v6.S | 40 ldrd r2, r3, [r1], r14
41 ldrd r4, r5, [r1], r14
42 ldrd r6, r7, [r1], r14
43 ldrd r8, r9, [r1]
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| R4R8First_v5.s | 35 ldrd r0, [r11]
36 ldrd r2, [r11, #8]
37 ldrd r4, [r11, #16]
38 ldrd r6, [r11, #24]
90 ldrd r0, [r14]
91 ldrd r2, [r14, #8]
92 ldrd r4, [r14, #16]
93 ldrd r6, [r14, #24]
143 ldrd r2, [r14, #32]
144 ldrd r4, [r14, #40
[all...] |
| PrePostMDCT_v5.s | 40 ldrd r4, [r0]
41 ldrd r6, [r3]
94 ldrd r4, [r0]
95 ldrd r6, [r3]
|
| Radix4FFT_v5.s | 55 ldrd r0, [r14, #0] @ r0 = xptr[0]@ r1 = xptr[1]@
58 ldrd r10, [r14, #0] @ r2 = xptr[0]@ r3 = xptr[1]@
82 ldrd r10, [r14, #0] @ r4 = xptr[0]@ r5 = xptr[1]@
94 ldrd r10, [r14] @ r6 = xptr[0]@ r7 = xptr[1]@
|
| /dalvik/vm/mterp/armv5te/ |
| OP_AGET_WIDE.S | 5 * Arrays of long/double are 64-bit aligned, so it's okay to use LDRD.
28 ldrd r2, [r0, #offArrayObject_contents] @ r2/r3<- vBB[vCC]
|
| OP_IGET_WIDE_QUICK.S | 10 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
|
| OP_IGET_WIDE.S | 41 ldrd r0, [r9, r3] @ r0/r1<- obj.field (64-bit align ok)
|
| OP_SGET_WIDE.S | 22 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| invalid-LDRD_PRE-thumb.txt | 9 # A8.6.66 LDRD (immediate)
10 # if Rn = '1111' then SEE LDRD (literal)
11 # A8.6.67 LDRD (literal)
|
| ldrd-armv4.txt | 9 # A8.6.68 LDRD (register)
13 # V5TE: ldrd
|
| unpredictable-LDRD-arm.txt | 8 # A8.6.68 LDRD (register)
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_IGET_WIDE_QUICK.S | 10 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
|
| OP_IGET_WIDE.S | 36 ldrd r0, [r9, r3] @ r0/r1<- obj.field (64-bit align ok)
|
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 715 COMPARE(ldrd(r0, r1, MemOperand(r1)),
716 "e1c100d0 ldrd r0, [r1, #+0]");
717 COMPARE(ldrd(r2, r3, MemOperand(r3, 127)),
718 "e1c327df ldrd r2, [r3, #+127]");
719 COMPARE(ldrd(r4, r5, MemOperand(r5, -127)),
720 "e14547df ldrd r4, [r5, #-127]");
721 COMPARE(ldrd(r6, r7, MemOperand(r7, 127, PostIndex)),
722 "e0c767df ldrd r6, [r7], #+127");
723 COMPARE(ldrd(r8, r9, MemOperand(r9, -127, PostIndex)),
724 "e04987df ldrd r8, [r9], #-127")
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_QuantInvInter_I_s.s | 82 LDRD tempVal21,[pSrcDst] ;// Loads first two values of pSrcDst to tempVal21,
121 LDRD tempVal21,[pSrcDst,#8] ;// Load next four Values to tempVal21,tempVal43
|
| /external/llvm/test/MC/ARM/ |
| diagnostics.s | 287 @ Out of order Rt/Rt2 operands for ldrd
288 ldrd r4, r3, [r8]
289 ldrd r4, r3, [r8, #8]!
290 ldrd r4, r3, [r8], #8
292 @ CHECK-ERRORS: ldrd r4, r3, [r8]
295 @ CHECK-ERRORS: ldrd r4, r3, [r8, #8]!
298 @ CHECK-ERRORS: ldrd r4, r3, [r8], #8
|
| arm-memory-instructions.s | 113 @ LDRD (immediate)
115 ldrd r3, r4, [r5]
116 ldrd r7, r8, [r2, #15]
117 ldrd r1, r2, [r9, #32]!
118 ldrd r6, r7, [r1], #8
119 ldrd r1, r2, [r8], #0
120 ldrd r1, r2, [r8], #+0
121 ldrd r1, r2, [r8], #-0
123 @ CHECK: ldrd r3, r4, [r5] @ encoding: [0xd0,0x30,0xc5,0xe1]
124 @ CHECK: ldrd r7, r8, [r2, #15] @ encoding: [0xdf,0x70,0xc2,0xe1
[all...] |
| /external/libvpx/vp8/encoder/arm/armv6/ |
| vp8_fast_fdct4x4_armv6.asm | 26 ldrd r4, r5, [r0] ; [i1 | i0] [i3 | i2]
49 ldrd r8, r9, [r0] ; [i5 | i4] [i7 | i6]
74 ldrd r4, r5, [r0] ; [i9 | i8] [i11 | i10]
99 ldrd r4, r5, [r0] ; [i13 | i12] [i15 | i14]
|
