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  /dalvik/vm/mterp/armv5te/
OP_AGET_CHAR.S 2 %include "armv5te/OP_AGET.S" { "load":"ldrh", "shift":"1" }
OP_IGET_CHAR.S 3 @include "armv5te/OP_IGET.S" { "load":"ldrh", "sqnum":"3" }
header.S 106 #define FETCH_INST() ldrh rINST, [rPC]
120 #define FETCH_ADVANCE_INST(_count) ldrh rINST, [rPC, #((_count)*2)]!
127 ldrh _dreg, [_sreg, #((_count)*2)]!
134 * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
139 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]!
147 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)]
  /dalvik/vm/compiler/template/armv5te/
TEMPLATE_STRING_COMPARETO.S 70 ldrh r3, [r2, #2]!
71 ldrh r4, [r1, #2]!
72 ldrh r7, [r2, #2]!
73 ldrh r8, [r1, #2]!
83 ldrh r3, [r2, #2]!
84 ldrh r4, [r1, #2]!
85 ldrh r7, [r2, #2]!
86 ldrh r8, [r1, #2]!
87 ldrh r9, [r2, #2]!
88 ldrh r12,[r1, #2]
    [all...]
TEMPLATE_STRING_INDEXOF.S 64 ldrh r3, [r0, #2]!
65 ldrh r4, [r0, #2]!
66 ldrh r10, [r0, #2]!
67 ldrh r11, [r0, #2]!
84 ldrh r3, [r0, #2]!
TEMPLATE_INVOKE_METHOD_NO_OPT.S 7 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
8 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
  /external/llvm/test/CodeGen/Thumb2/
thumb2-ldrh.ll 6 ; CHECK: ldrh r0, [r0]
14 ; CHECK: ldrh.w r0, [r0, #2046]
24 ; CHECK: ldrh r0, [r0, r1]
33 ; CHECK: ldrh r0, [r0, #-128]
43 ; CHECK: ldrh r0, [r0, r1]
53 ; CHECK: ldrh.w r0, [r0, r1, lsl #2]
65 ; CHECK: ldrh r0, [r0, r1]
  /external/libvpx/vp8/encoder/arm/armv6/
vp8_fast_quantize_b_armv6.asm 130 ldrh r2, [r0, #30] ; rc=15, i=15
135 ldrh r3, [r0, #28] ; rc=14, i=14
141 ldrh r2, [r0, #22] ; rc=11, i=13
147 ldrh r3, [r0, #14] ; rc=7, i=12
152 ldrh r2, [r0, #20] ; rc=10, i=11
158 ldrh r3, [r0, #26] ; rc=13, i=10
163 ldrh r2, [r0, #24] ; rc=12, i=9
169 ldrh r3, [r0, #18] ; rc=9, i=8
174 ldrh r2, [r0, #12] ; rc=6, i=7
180 ldrh r3, [r0, #6] ; rc=3, i=
    [all...]
  /external/llvm/test/CodeGen/Thumb/
ldr_ext.ll 16 ; V5: ldrh
18 ; V6: ldrh
37 ; V5: ldrh
41 ; V6: ldrh
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/
syn_filt_opt.s 47 LDRH r6, [r4], #2
48 LDRH r7, [r4], #2
49 LDRH r8, [r4], #2
50 LDRH r9, [r4], #2
51 LDRH r10, [r4], #2
52 LDRH r11, [r4], #2
53 LDRH r12, [r4], #2
54 LDRH r14, [r4], #2
65 LDRH r6, [r4], #2
66 LDRH r7, [r4], #
    [all...]
residu_asm_opt.s 35 LDRH r5, [r0], #2
36 LDRH r6, [r0], #2
39 LDRH r6, [r0], #2
40 LDRH r7, [r0], #2
43 LDRH r7, [r0], #2
44 LDRH r8, [r0], #2
47 LDRH r8, [r0], #2
48 LDRH r9, [r0], #2
51 LDRH r9, [r0], #2
52 LDRH r10, [r0], #
    [all...]
  /external/llvm/test/CodeGen/ARM/
fast-isel-fold.ll 21 ; ARM: ldrh
24 ; THUMB: ldrh
48 ; ARM: ldrh
51 ; THUMB: ldrh
fast-isel-ldrh-strh-arm.ll 9 ; ARM: ldrh r0, [r0, #-16]
18 ; ARM: ldrh r0, [r0, #-32]
27 ; ARM: ldrh r0, [r0, #-254]
38 ; ARM: ldrh r0, [r0]
47 ; ARM: ldrh r0, [r0, #16]
56 ; ARM: ldrh r0, [r0, #32]
65 ; ARM: ldrh r0, [r0, #254]
75 ; ARM: ldrh r0, [r0]
fast-isel-ldr-str-arm.ll 26 ; ARM: ldrh r{{[0-9]}}, [r0, #2]
35 ; ARM: ldrh.w r{{[0-9]}}, [r0, #126]
ldr_ext.ll 11 ; CHECK: ldrh
load.ll 5 ; RUN: grep ldrh %t
  /bionic/libc/arch-arm/bionic/
memcmp16.S 68 1: ldrh r0, [r3], #2
69 ldrh ip, [r1], #2
85 ldrh r0, [r3], #2
86 ldrh ip, [r1], #2
165 ldrh r0, [r3, #-4]
166 ldrh ip, [r1, #-4]
176 8: ldrh r0, [r3], #2
177 ldrh ip, [r1], #2
  /external/v8/test/cctest/
test-disasm-arm.cc 605 COMPARE(ldrh(r0, MemOperand(r1)),
606 "e1d100b0 ldrh r0, [r1, #+0]");
607 COMPARE(ldrh(r2, MemOperand(r3, 42)),
608 "e1d322ba ldrh r2, [r3, #+42]");
609 COMPARE(ldrh(r4, MemOperand(r5, -42)),
610 "e15542ba ldrh r4, [r5, #-42]");
611 COMPARE(ldrh(r6, MemOperand(r7, 42, PostIndex)),
612 "e0d762ba ldrh r6, [r7], #+42");
613 COMPARE(ldrh(r8, MemOperand(r9, -42, PostIndex)),
614 "e05982ba ldrh r8, [r9], #-42")
    [all...]
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/
armVCM4P2_SetPredDir_s.s 72 LDRH blockDCTopLeft,[pCoefBufRow,#-16]
73 LDRH blockDCLeft,[pCoefBufCol]
omxVCM4P2_PredictReconCoefIntra_s.s 157 LDRH temp,[predCoeffTable,temp] ;// Load value from coeff table for performing division using multiplication
167 LDRH temp,[pPredBufCol]
176 LDRH temp,[pSrcDst] ;// temp=pSrcDst[0]
218 LDRH temp,[pSrcDst,Count] ;// temp=pSrcDst[i],1<=i<8
246 LDRH absCoeffAC,[pPredBufCol,temp2] ;// absCoefAC=pPredBufCol[i>>3]
256 LDRH temp,[pSrcDst,Count] ;// temp=pSrcDst[i]
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
armVCM4P2_SetPredDir_s.s 72 LDRH blockDCTopLeft,[pCoefBufRow,#-16]
73 LDRH blockDCLeft,[pCoefBufCol]
  /external/skia/src/opts/
SkBitmapProcState_opts_arm.cpp 74 "ldrh r4, [%[table], r4] \n\t" // load pixel 0 RGB565 from colmap
76 "ldrh r5, [%[table], r5] \n\t" // load pixel 1 RGB565 from colmap
78 "ldrh r6, [%[table], r6] \n\t" // load pixel 2 RGB565 from colmap
80 "ldrh r7, [%[table], r7] \n\t" // load pixel 3 RGB565 from colmap
82 "ldrh r8, [%[table], r8] \n\t" // load pixel 4 RGB565 from colmap
83 "ldrh r9, [%[table], r9] \n\t" // load pixel 5 RGB565 from colmap
84 "ldrh r10, [%[table], r10] \n\t" // load pixel 6 RGB565 from colmap
85 "ldrh r11, [%[table], r11] \n\t" // load pixel 7 RGB565 from colmap
170 "ldrh r4, [%[xx]], #2 \n\t" // load pixel ptr
  /external/libvpx/vp8/common/arm/armv6/
simpleloopfilter_v6.asm 156 ldrh r3, [src, #-2]
157 ldrh r4, [src], pstep
160 ldrh r5, [src, #-2]
161 ldrh r6, [src], pstep
166 ldrh r3, [src, #-2]
167 ldrh r4, [src], pstep
172 ldrh r5, [src, #-2]
173 ldrh r6, [src], pstep
  /external/libvpx/vp8/decoder/arm/neon/
idct_dequant_0_2x_neon.asm 36 ldrh r12, [r0] ; lo q
37 ldrh r2, [r0, #32] ; hi q
  /sdk/emulator/qtools/
opcode.cpp 129 "ldrh",
181 "ldrh",

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