| /external/oprofile/events/avr32/ |
| events | 4 event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
12 event:0x09 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_WBUF_FULL : cycles stalled due to data cache write buffers full
14 event:0x0b counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_READ_MISS : cycles stalled due to data cache read miss
19 event:0x10 counters:1,2 um:zero minimum:500 name:CACHE_STALL : read or write access that stalled
20 event:0x11 counters:1,2 um:zero minimum:500 name:CYCLES_CACHE_STALL : cycles stalled doing read or write access
|
| /external/dropbear/ |
| progressmeter.c | 37 #define STALL_TIME 5 /* we're stalled after this many seconds */
62 static long stalled; /* how long we have been stalled */ variable
183 stalled += elapsed;
185 stalled = 0;
187 if (stalled >= STALL_TIME)
188 strlcat(buf, "- stalled -", win_size);
246 stalled = 0;
|
| /external/openssh/ |
| progressmeter.c | 47 #define STALL_TIME 5 /* we're stalled after this many seconds */
72 static long stalled; /* how long we have been stalled */ variable
193 stalled += elapsed;
195 stalled = 0;
197 if (stalled >= STALL_TIME)
198 strlcat(buf, "- stalled -", win_size);
257 stalled = 0;
|
| /external/oprofile/events/arm/armv7-ca9/ |
| events | 29 event:0x80 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_PLD : Number of cycles where CPU is stalled because PLD slots are all full
30 event:0x81 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_WRITE : Number of cycles where CPU is stalled because data side is full and executing writes to external memory
31 event:0x82 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_INS_TLB : Number of cycles where CPU is stalled because of main TLB misses on requests issued by the instruction side
32 event:0x83 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DATA_TLB : Number of cycles where CPU is stalled because of main TLB misses on requests issued by the data side
33 event:0x84 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_INS_UTLB : Number of cycles where CPU is stalled because of micro TLB misses on the instruction side
34 event:0x85 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DATA_ULTB : Number of cycles where CPU is stalled because of micro TLB misses on the data side
35 event:0x86 counters:1,2,3,4,5,6 um:zero minimum:500 name:STALL_DMB : Number of cycles where CPU is stalled due to executed of a DMB memory barrier
|
| /external/oprofile/events/alpha/ev67/ |
| events | 10 event:0x04 counters:0 um:zero minimum:500 name:STALLED_0 : PCTR0 triggered; stalled between fetch and map stages
19 event:0x0d counters:0 um:zero minimum:500 name:STALLED_1 : PCTR1 triggered; stalled between fetch and map stages
|
| /external/oprofile/events/arm/armv6/ |
| events | 4 event:0x01 counters:0,1 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
18 event:0x11 counters:0,1 um:zero minimum:500 name:LSU_STALL : cycles stalled because Load Store request queque is full
|
| /external/oprofile/events/ppc/e500/ |
| events | 51 event:0x33 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_DLFB_FULL_CYCLES : Cycles stalled on replay condition - Load miss with dLFB full.
52 event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full.
53 event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer.
54 event:0x36 counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full.
55 event:0x37 counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision.
56 event:0x38 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_CYCLES : Cycles stalled on replay condition - DMMU miss.
57 event:0x39 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_CYCLES : Cycles stalled on replay condition - DMMU busy.
58 event:0x3a counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache.
|
| /external/oprofile/events/ppc/e500v2/ |
| events | 51 event:0x33 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_DLFB_FULL_CYCLES : Cycles stalled on replay condition - Load miss with dLFB full.
52 event:0x34 counters:0,1,2,3 um:zero minimum:500 name:LOAD_MISS_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Load miss with load queue full.
53 event:0x35 counters:0,1,2,3 um:zero minimum:500 name:LOAD_GUARDED_MISS_NOT_LAST_CYCLES : Cycles stalled on replay condition - Load guarded miss when the load is not yet at the bottom of the completion buffer.
54 event:0x36 counters:0,1,2,3 um:zero minimum:500 name:STORE_TRANSLATED_QUEUE_FULL_CYCLES : Cycles stalled on replay condition - Translate a store when the StQ is full.
55 event:0x37 counters:0,1,2,3 um:zero minimum:500 name:ADDRESS_COLLISION_CYCLES : Cycles stalled on replay condition - Address collision.
56 event:0x38 counters:0,1,2,3 um:zero minimum:500 name:DMMU_MISS_CYCLES : Cycles stalled on replay condition - DMMU miss.
57 event:0x39 counters:0,1,2,3 um:zero minimum:500 name:DMMU_BUSY_CYCLES : Cycles stalled on replay condition - DMMU busy.
58 event:0x3a counters:0,1,2,3 um:zero minimum:500 name:SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES : Cycles stalled on replay condition - Second part of misaligned access when first part missed in cache.
|
| /external/oprofile/events/ppc/e300/ |
| events | 35 event:0x64 counters:0,1,2,3 um:zero minimum:500 name:STALLS_COM_BUFFER : Cycles issue stalled due to full completion buffer
36 event:0x68 counters:0,1,2,3 um:zero minimum:500 name:STALLED_COMPLETION : Cycles that completion is stalled
37 event:0x69 counters:0,1,2,3 um:zero minimum:500 name:STALLED_LOAD : Cycles that completion is stalled due to load
38 event:0x6a counters:0,1,2,3 um:zero minimum:500 name:STALLED_FLOAT : Cycles that completion is stalled due to fp instruction
|
| /external/dbus/tools/ |
| dbus-monitor.1 | |
| dbus-send.1 | |
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 91 // Stalled for 4 cycles but still can't schedule any other instructions.
|
| /external/oprofile/events/arm/mpcore/ |
| events | 4 event:0x01 counters:0,1 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
|
| /external/oprofile/events/arm/xscale1/ |
| events | 4 event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
|
| /external/oprofile/events/arm/xscale2/ |
| events | 4 event:0x01 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
|
| /external/webkit/Source/WebCore/dom/ |
| EventNames.h | 150 macro(stalled) \
|
| /external/chromium/net/spdy/ |
| spdy_stream.h | 134 void set_stalled_by_flow_control(bool stalled) {
135 stalled_by_flow_control_ = stalled;
|
| /external/oprofile/events/i386/ppro/ |
| events | 12 event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled
13 event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled
|
| /external/chromium/chrome/browser/resources/net_internals/ |
| socketpoolwrapper.js | 134 tablePrinter.addHeaderCell('Stalled');
|
| /external/jmonkeyengine/engine/src/networking/com/jme3/network/base/ |
| ConnectorAdapter.java | 94 // stalled but 16,000 messages is still a big backlog.
|
| /external/linux-tools-perf/util/ |
| parse-events.c | 41 { CHW(STALLED_CYCLES_FRONTEND), "stalled-cycles-frontend", "idle-cycles-frontend" },
42 { CHW(STALLED_CYCLES_BACKEND), "stalled-cycles-backend", "idle-cycles-backend" },
77 "stalled-cycles-frontend",
78 "stalled-cycles-backend",
|
| /external/chromium/net/socket/ |
| client_socket_pool_base.cc | 334 // We could check if we really have a stalled group here, but it requires
737 // If we have idle sockets, see if we can give one to the top-stalled group.
753 // Note: we don't loop on waking stalled groups. If the stalled group is at
754 // its limit, may be left with other stalled groups that could be
[all...] |
| /external/oprofile/events/i386/core/ |
| events | 72 event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled
73 event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled
|
| /external/oprofile/events/i386/p6_mobile/ |
| events | 12 event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled
13 event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled
|
| /external/oprofile/events/i386/pii/ |
| events | 12 event:0x86 counters:0,1 um:zero minimum:500 name:IFU_MEM_STALL : cycles instruction fetch pipe is stalled
13 event:0x87 counters:0,1 um:zero minimum:500 name:ILD_STALL : cycles instruction length decoder is stalled
|
