| /external/llvm/test/CodeGen/X86/ |
| i128-mul.ll | 5 %tmp0 = zext i64 %x to i128
6 %tmp1 = zext i64 %y to i128
8 %tmp7 = zext i32 64 to i128
|
| shift-folding.ll | 11 %gep.upgrd.1 = zext i32 %Y to i64
24 %gep.upgrd.2 = zext i32 %Y to i64
62 %i.zext = zext i16 %i to i32
63 %index = lshr i32 %i.zext, 11
64 %index.zext = zext i32 %index to i64
65 %val.ptr = getelementptr inbounds i32* %arr, i64 %index.zext
67 %val.zext = zext i32 %val to i6
[all...] |
| zext-shl.ll | 9 %0 = zext i8 %x to i16
11 %2 = zext i16 %1 to i32
21 %0 = zext i8 %x to i16
23 %2 = zext i16 %1 to i32
|
| vec_zext.ll | 6 %G = zext <4 x i16> %F to <4 x i32>
8 %Y = zext <4 x i16> %H to <4 x i32>
16 %G = zext <4 x i16> %F to <4 x i64>
18 %Y = zext <4 x i16> %H to <4 x i64>
26 %G = zext <4 x i32> %F to <4 x i64>
28 %Y = zext <4 x i32> %H to <4 x i64>
35 %G = zext <4 x i8> %F to <4 x i16>
37 %Y = zext <4 x i8> %H to <4 x i16>
44 %G = zext <4 x i8> %F to <4 x i32>
46 %Y = zext <4 x i8> %H to <4 x i32
[all...] |
| adde-carry.ll | 5 %0 = zext i64 %a to i128
6 %1 = zext i64 %b to i128
8 %3 = zext i64 %c to i128
|
| avx-zext.ll | 8 %B = zext <8 x i16> %A to <8 x i32>
17 %B = zext <4 x i32> %A to <4 x i64>
28 %t = zext <8 x i8> %z to <8 x i32>
|
| fold-and-shift.ll | 39 ; To make matters worse, because of the two-phase zext of %i and their reuse in
50 %i.zext = zext i16 %i to i32
51 %index = lshr i32 %i.zext, 11
54 %sum = add i32 %val, %i.zext
69 %i.zext = zext i16 %i to i32
70 %index = lshr i32 %i.zext, 11
71 %index.zext = zext i32 %index to i6
[all...] |
| extmul128.ll | 10 %aa = zext i64 %a to i128
11 %bb = zext i64 %b to i128
|
| extmul64.ll | 10 %aa = zext i32 %a to i64
11 %bb = zext i32 %b to i64
|
| pr11202.ll | 10 %a = zext i1 false to i32
14 %b = zext i1 false to i32
|
| /external/llvm/test/Transforms/InstCombine/ |
| zext-fold.ll | 1 ; RUN: opt < %s -instcombine -S | grep "zext " | count 1
7 %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
9 %toBoolnot5 = zext i8 %tmp to i32 ; <i32> [#uses=1]
|
| 2007-01-13-ExtCompareMiscompile.ll | 6 %a = zext i8 %A to i32
7 %b = zext i8 %B to i32
|
| udivrem-change-width.ll | 7 %conv = zext i8 %a to i32
8 %conv2 = zext i8 %b to i32
17 %conv = zext i8 %a to i32
18 %conv2 = zext i8 %b to i32
27 %conv = zext i8 %a to i32
28 %conv2 = zext i8 %b to i32
33 ; CHECK: zext
37 %conv = zext i8 %a to i32
38 %conv2 = zext i8 %b to i32
43 ; CHECK: zext
[all...] |
| apint-zext2.ll | 6 %c1 = zext i77 %A to i533
9 ; CHECK: %c2 = zext i77 %A to i1024
|
| zext.ll | 5 %c1 = zext i16 %A to i32 ; <i32> [#uses=1]
9 ; CHECK: %c2 = zext i16 %A to i64
|
| zext-bool-add-sub.ll | 7 ; CHECK: [[TMP1:%.*]] = zext i1 %y to i32
10 %conv = zext i1 %x to i32
11 %conv3 = zext i1 %y to i32
|
| /external/llvm/test/Assembler/ |
| 2007-07-19-ParamAttrAmbiguity.ll | 5 zext i8 %t to i32
|
| /external/llvm/test/CodeGen/Generic/ |
| i128-arith.ll | 4 %tmp0 = zext i64 %x to i128
7 %tmp7 = zext i32 13 to i128
|
| i128-addsub.ll | 5 %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
6 %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
9 %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
10 %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
24 %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
25 %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
28 %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
29 %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| fold.ll | 4 %A = zext i8 %x to i12
6 ; CHECK: zext i8 %x to i16
11 %A = zext i8 %x to i16
19 %A = zext i8 %x to i16
47 ; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34)
48 %F = zext i16 %B to i30
51 %G = zext i16 %B to i32
54 %H = zext i16 %B to i34
56 ; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34)
|
| 2009-07-04-GroupConstantsWidthMismatch.ll | 9 %3 = zext i16 %2 to i32
13 %7 = zext i8 %6 to i32
|
| xor-and.ll | 2 ; RUN: | grep "\--> (zext i4 (-8 + (trunc i64 (8 \* %x) to i4)) to i64)"
5 ; --> (zext i4 (-1 + (-1 * (trunc i64 (8 * %x) to i4))) to i64)
|
| /external/llvm/test/CodeGen/Mips/ |
| shift-parts.ll | 7 %sh_prom = zext i32 %b to i64
16 %sh_prom = zext i32 %b to i64
25 %sh_prom = zext i32 %b to i64
|
| /external/llvm/lib/Target/CellSPU/ |
| SPU128InstrInfo.td | 7 // zext 32->128: Zero extend 32-bit to 128-bit
8 def : Pat<(i128 (zext R32C:$rSrc)),
11 // zext 64->128: Zero extend 64-bit to 128-bit
12 def : Pat<(i128 (zext R64C:$rSrc)),
15 // zext 16->128: Zero extend 16-bit to 128-bit
16 def : Pat<(i128 (zext R16C:$rSrc)),
19 // zext 8->128: Zero extend 8-bit to 128-bit
20 def : Pat<(i128 (zext R8C:$rSrc)),
|
| /external/llvm/test/CodeGen/ARM/ |
| cmn.ll | 10 %. = zext i1 %cmp to i32
20 %. = zext i1 %cmp to i32
|
