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76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq)    static inline void pfx##write##bwlq(type val,   volatile void __iomem *mem)  {   volatile type *__mem;   type __val;     __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem));     __val = pfx##ioswab##bwlq(__mem, val);     if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long))   *__mem = __val;   else if (cpu_has_64bits) {   unsigned long __flags;   type __tmp;     if (irq)   local_irq_save(__flags);   __asm__ __volatile__(   ".set	mips3" "\t\t# __writeq""\n\t"   "dsll32	%L0, %L0, 0" "\n\t"   "dsrl32	%L0, %L0, 0" "\n\t"   "dsll32	%M0, %M0, 0" "\n\t"   "or	%L0, %L0, %M0" "\n\t"   "sd	%L0, %2" "\n\t"   ".set	mips0" "\n"   : "=r" (__tmp)   : "0" (__val), "m" (*__mem));   if (irq)   local_irq_restore(__flags);   } else   BUG();  }    static inline type pfx##read##bwlq(const volatile void __iomem *mem)  {   volatile type *__mem;   type __val;     __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem));     if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long))   __val = *__mem;   else if (cpu_has_64bits) {   unsigned long __flags;     if (irq)   local_irq_save(__flags);   __asm__ __volatile__(   ".set	mips3" "\t\t# __readq" "\n\t"   "ld	%L0, %1" "\n\t"   "dsra32	%M0, %L0, 0" "\n\t"   "sll	%L0, %L0, 0" "\n\t"   ".set	mips0" "\n"   : "=r" (__val)   : "m" (*__mem));   if (irq)   local_irq_restore(__flags);   } else {   __val = 0;   BUG();   }     return pfx##ioswab##bwlq(__mem, __val);  }