Lines Matching refs:PhysicalReg_EDX
47 #define P_SCRATCH_1 PhysicalReg_EDX
51 #define PP_GPR_4 PhysicalReg_EDX
134 #define P_GPR_3 PhysicalReg_EDX
138 #define PP_GPR_4 PhysicalReg_EDX
173 move_mem_to_reg(OpndSize_32, offMethod_name, PhysicalReg_EAX, true, PhysicalReg_EDX, true); //method name
187 #define PP_GPR_4 PhysicalReg_EDX
226 #define PP_GPR_4 PhysicalReg_EDX
263 #define PP_GPR_4 PhysicalReg_EDX
528 #define P_SCRATCH_3 PhysicalReg_EDX
570 nextVersionOfHardReg(PhysicalReg_EDX, 1);
571 move_imm_to_reg(OpndSize_32, (int)rPC, PhysicalReg_EDX, true);
608 #define P_GPR_3 PhysicalReg_EDX //not used with P_SCRATCH_2
610 #define P_SCRATCH_2 PhysicalReg_EDX
612 #define P_SCRATCH_4 PhysicalReg_EDX
614 #define P_SCRATCH_6 PhysicalReg_EDX
616 #define P_SCRATCH_8 PhysicalReg_EDX
618 #define P_SCRATCH_10 PhysicalReg_EDX
714 #define P_SCRATCH_2 PhysicalReg_EDX
716 #define P_SCRATCH_4 PhysicalReg_EDX
718 #define P_SCRATCH_6 PhysicalReg_EDX
767 scratchRegs[2] = PhysicalReg_EDX; scratchRegs[3] = PhysicalReg_Null;
772 move_reg_to_mem(OpndSize_32, PhysicalReg_EDX, true, offStackSaveArea_savedPc-sizeofStackSaveArea, P_GPR_3, true);
796 PhysicalReg_EDX, true);
797 move_reg_to_mem(OpndSize_32, PhysicalReg_EDX, true,
819 PhysicalReg_EDX, true);
823 move_reg_to_mem(OpndSize_32, PhysicalReg_EDX, true,
840 move_imm_to_reg(OpndSize_32, kInlineCacheMiss, PhysicalReg_EDX, true);
846 PhysicalReg_EDX, true);
848 unconditional_jump_reg(PhysicalReg_EDX, true);
868 scratchRegs[0] = PhysicalReg_EDX;
918 move_imm_to_reg(OpndSize_32, kCallsiteInterpreted, PhysicalReg_EDX, true);
948 #define P_SCRATCH_2 PhysicalReg_EDX
950 #define P_SCRATCH_4 PhysicalReg_EDX
1188 #define P_SCRATCH_2 PhysicalReg_EDX
1192 #define PP_GPR_4 PhysicalReg_EDX
1268 #define P_SCRATCH_1 PhysicalReg_EDX
1327 #define P_SCRATCH_2 PhysicalReg_EDX
1341 scratchRegs[0] = PhysicalReg_EDX;
