Lines Matching refs:UseMI
629 MachineInstr *UseMI = &*UI;
630 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
635 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
674 MachineInstr *UseMI = &*UI;
676 if (UseMI->isDebugValue()) {
682 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
692 if (UseMI == CopyMI)
694 if (!UseMI->isCopy())
696 if (UseMI->getOperand(0).getReg() != IntB.reg ||
697 UseMI->getOperand(0).getSubReg())
706 DEBUG(dbgs() << "\t\tnoop: " << DefIdx << '\t' << *UseMI);
709 ErasedInstrs.insert(UseMI);
710 LIS->RemoveMachineInstrFromMaps(UseMI);
711 UseMI->eraseFromParent();
896 MachineInstr *UseMI = I.skipInstruction();) {
899 // the UseMI operands removes them from the SrcReg use-def chain, but when
900 // SrcReg is DstReg we could encounter UseMI twice if it has multiple
902 if (SrcReg == DstReg && !Visited.insert(UseMI))
907 tie(Reads, Writes) = UseMI->readsWritesVirtualRegister(SrcReg, &Ops);
912 Reads = DstInt->liveAt(LIS->getInstructionIndex(UseMI));
914 // Replace SrcReg with DstReg in all UseMI operands.
916 MachineOperand &MO = UseMI->getOperand(Ops[i]);
932 if (!UseMI->isDebugValue())
933 dbgs() << LIS->getInstructionIndex(UseMI) << "\t";
934 dbgs() << *UseMI;
