Lines Matching defs:Latency
26 cl::desc("Use TargetSchedModel for latency lookup"));
29 cl::desc("Use InstrItineraryData for latency lookup"));
92 // The machine model may explicitly specify an invalid latency, which
93 // effectively means infinite latency. Since users of the TargetSchedule API
94 // don't know how to handle this, we convert it to a very large latency that is
100 /// If we can determine the operand latency from the def only, without machine
105 // Return a latency based on the itinerary properties and defining instruction
106 // if possible. Some common subtargets don't require per-operand latency,
110 // itinerary exists either, then use single cycle latency.
198 // No operand latency was found.
201 // Expected latency is the max of the stage latency and itinerary props.
202 // Rather than directly querying InstrItins stage latency, we call a TII
203 // hook to allow subtargets to specialize latency. This hook is only
216 // Lookup the definition's write latency in SubtargetInfo.
220 unsigned Latency = convertLatency(WLEntry->Cycles);
222 return Latency;
224 // Lookup the use's latency adjustment in SubtargetInfo.
227 return Latency;
229 return Latency - STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID);
232 // unit latency (defaultDefLatency may be too conservative).
245 // desc like flags. Truly implicit defs should get 1 cycle latency.
258 unsigned Latency = 0;
261 // Lookup the definition's write latency in SubtargetInfo.
264 Latency = std::max(Latency, convertLatency(WLEntry->Cycles));
266 return Latency;
277 // latencies, but since this is not a RAW dep, we always use unit latency.
