Lines Matching refs:DestSubReg
959 unsigned DestSubReg;
962 case 8: DestSubReg = AArch64::sub_8; break;
963 case 16: DestSubReg = AArch64::sub_16; break;
964 case 32: DestSubReg = AArch64::sub_32; break;
965 case 64: DestSubReg = AArch64::sub_64; break;
971 DAG.getTargetConstant(DestSubReg, MVT::i32)),
