Lines Matching refs:Case
958 case AArch64MCExpr::VK_AARCH64_ABS_G0:
959 case AArch64MCExpr::VK_AARCH64_ABS_G0_NC:
960 case AArch64MCExpr::VK_AARCH64_SABS_G0:
961 case AArch64MCExpr::VK_AARCH64_DTPREL_G0:
962 case AArch64MCExpr::VK_AARCH64_DTPREL_G0_NC:
963 case AArch64MCExpr::VK_AARCH64_GOTTPREL_G0_NC:
964 case AArch64MCExpr::VK_AARCH64_TPREL_G0:
965 case AArch64MCExpr::VK_AARCH64_TPREL_G0_NC:
968 case AArch64MCExpr::VK_AARCH64_ABS_G1:
969 case AArch64MCExpr::VK_AARCH64_ABS_G1_NC:
970 case AArch64MCExpr::VK_AARCH64_SABS_G1:
971 case AArch64MCExpr::VK_AARCH64_DTPREL_G1:
972 case AArch64MCExpr::VK_AARCH64_DTPREL_G1_NC:
973 case AArch64MCExpr::VK_AARCH64_GOTTPREL_G1:
974 case AArch64MCExpr::VK_AARCH64_TPREL_G1:
975 case AArch64MCExpr::VK_AARCH64_TPREL_G1_NC:
978 case AArch64MCExpr::VK_AARCH64_ABS_G2:
979 case AArch64MCExpr::VK_AARCH64_ABS_G2_NC:
980 case AArch64MCExpr::VK_AARCH64_SABS_G2:
981 case AArch64MCExpr::VK_AARCH64_DTPREL_G2:
982 case AArch64MCExpr::VK_AARCH64_TPREL_G2:
985 case AArch64MCExpr::VK_AARCH64_ABS_G3:
1043 case A64SE::UXTW:
1044 case A64SE::LSL:
1047 case A64SE::SXTW:
1048 case A64SE::SXTX:
1087 case AsmToken::Identifier: {
1111 case AsmToken::LParen: // E.g. (strcmp-4)
1112 case AsmToken::Integer: // 1f, 2b labels
1113 case AsmToken::String: // quoted labels
1114 case AsmToken::Dot: // . is Current location
1115 case AsmToken::Dollar: // $ is PC
1116 case AsmToken::Colon: {
1128 case AsmToken::Hash: { // Immediates
1141 case AsmToken::LBrac: {
1151 case AsmToken::LCurly: // Weird SIMD lists
1232 .Case("got", AArch64MCExpr::VK_AARCH64_GOT)
1233 .Case("got_lo12", AArch64MCExpr::VK_AARCH64_GOT_LO12)
1234 .Case("lo12", AArch64MCExpr::VK_AARCH64_LO12)
1235 .Case("abs_g0", AArch64MCExpr::VK_AARCH64_ABS_G0)
1236 .Case("abs_g0_nc", AArch64MCExpr::VK_AARCH64_ABS_G0_NC)
1237 .Case("abs_g1", AArch64MCExpr::VK_AARCH64_ABS_G1)
1238 .Case("abs_g1_nc", AArch64MCExpr::VK_AARCH64_ABS_G1_NC)
1239 .Case("abs_g2", AArch64MCExpr::VK_AARCH64_ABS_G2)
1240 .Case("abs_g2_nc", AArch64MCExpr::VK_AARCH64_ABS_G2_NC)
1241 .Case("abs_g3", AArch64MCExpr::VK_AARCH64_ABS_G3)
1242 .Case("abs_g0_s", AArch64MCExpr::VK_AARCH64_SABS_G0)
1243 .Case("abs_g1_s", AArch64MCExpr::VK_AARCH64_SABS_G1)
1244 .Case("abs_g2_s", AArch64MCExpr::VK_AARCH64_SABS_G2)
1245 .Case("dtprel_g2", AArch64MCExpr::VK_AARCH64_DTPREL_G2)
1246 .Case("dtprel_g1", AArch64MCExpr::VK_AARCH64_DTPREL_G1)
1247 .Case("dtprel_g1_nc", AArch64MCExpr::VK_AARCH64_DTPREL_G1_NC)
1248 .Case("dtprel_g0", AArch64MCExpr::VK_AARCH64_DTPREL_G0)
1249 .Case("dtprel_g0_nc", AArch64MCExpr::VK_AARCH64_DTPREL_G0_NC)
1250 .Case("dtprel_hi12", AArch64MCExpr::VK_AARCH64_DTPREL_HI12)
1251 .Case("dtprel_lo12", AArch64MCExpr::VK_AARCH64_DTPREL_LO12)
1252 .Case("dtprel_lo12_nc", AArch64MCExpr::VK_AARCH64_DTPREL_LO12_NC)
1253 .Case("gottprel_g1", AArch64MCExpr::VK_AARCH64_GOTTPREL_G1)
1254 .Case("gottprel_g0_nc", AArch64MCExpr::VK_AARCH64_GOTTPREL_G0_NC)
1255 .Case("gottprel", AArch64MCExpr::VK_AARCH64_GOTTPREL)
1256 .Case("gottprel_lo12", AArch64MCExpr::VK_AARCH64_GOTTPREL_LO12)
1257 .Case("tprel_g2", AArch64MCExpr::VK_AARCH64_TPREL_G2)
1258 .Case("tprel_g1", AArch64MCExpr::VK_AARCH64_TPREL_G1)
1259 .Case("tprel_g1_nc", AArch64MCExpr::VK_AARCH64_TPREL_G1_NC)
1260 .Case("tprel_g0", AArch64MCExpr::VK_AARCH64_TPREL_G0)
1261 .Case("tprel_g0_nc", AArch64MCExpr::VK_AARCH64_TPREL_G0_NC)
1262 .Case("tprel_hi12", AArch64MCExpr::VK_AARCH64_TPREL_HI12)
1263 .Case("tprel_lo12", AArch64MCExpr::VK_AARCH64_TPREL_LO12)
1264 .Case("tprel_lo12_nc", AArch64MCExpr::VK_AARCH64_TPREL_LO12_NC)
1265 .Case("tlsdesc", AArch64MCExpr::VK_AARCH64_TLSDESC)
1266 .Case("tlsdesc_lo12", AArch64MCExpr::VK_AARCH64_TLSDESC_LO12)
1443 .Case("ip0", AArch64::X16)
1444 .Case("ip1", AArch64::X17)
1445 .Case("fp", AArch64::X29)
1446 .Case("lr", AArch64::X30)
1467 .Case(".d", ".d").Case(".1d", ".1d").Case(".2d", ".2d")
1468 .Case(".s", ".s").Case(".2s", ".2s").Case(".4s", ".4s")
1469 .Case(".h", ".h").Case(".4h", ".4h").Case(".8h", ".8h")
1470 .Case(".b", ".b").Case(".8b", ".8b").Case(".16b", ".16b")
1506 case 'b': NumLanes = 16; break;
1507 case 'h': NumLanes = 8; break;
1508 case 's': NumLanes = 4; break;
1509 case 'd': NumLanes = 2; break;
1664 .Case("lsl", A64SE::LSL)
1665 .Case("lsr", A64SE::LSR)
1666 .Case("asr", A64SE::ASR)
1667 .Case("ror", A64SE::ROR)
1668 .Case("uxtb", A64SE::UXTB)
1669 .Case("uxth", A64SE::UXTH)
1670 .Case("uxtw", A64SE::UXTW)
1671 .Case("uxtx", A64SE::UXTX)
1672 .Case("sxtb", A64SE::SXTB)
1673 .Case("sxth", A64SE::SXTH)
1674 .Case("sxtw", A64SE::SXTW)
1675 .Case("sxtx", A64SE::SXTX)
1732 case AArch64::BFIwwii:
1733 case AArch64::BFIxxii:
1734 case AArch64::SBFIZwwii:
1735 case AArch64::SBFIZxxii:
1736 case AArch64::UBFIZwwii:
1737 case AArch64::UBFIZxxii: {
1748 case AArch64::BFXILwwii:
1749 case AArch64::BFXILxxii:
1750 case AArch64::SBFXwwii:
1751 case AArch64::SBFXxxii:
1752 case AArch64::UBFXwwii:
1753 case AArch64::UBFXxxii: {
1759 case AArch64::SBFXxxii: case AArch64::UBFXxxii: case AArch64::BFXILxxii:
1762 case AArch64::SBFXwwii: case AArch64::UBFXwwii: case AArch64::BFXILwwii:
1773 case AArch64::ICix: {
1782 case AArch64::ICi: {
1791 case AArch64::TLBIix: {
1800 case AArch64::TLBIi: {
1970 case Match_Success:
1976 case Match_MissingFeature:
1979 case Match_InvalidOperand: {
1988 case Match_MnemonicFail:
1991 case Match_AddSubRegExtendSmall:
1994 case Match_AddSubRegExtendLarge:
1997 case Match_AddSubRegShift32:
2000 case Match_AddSubRegShift64:
2003 case Match_AddSubSecondSource:
2006 case Match_CVTFixedPos32:
2009 case Match_CVTFixedPos64:
2012 case Match_CondCode:
2015 case Match_FPImm:
2020 case Match_FPZero:
2023 case Match_Label:
2026 case Match_Lane1:
2029 case Match_LoadStoreExtend32_1:
2032 case Match_LoadStoreExtend32_2:
2035 case Match_LoadStoreExtend32_4:
2038 case Match_LoadStoreExtend32_8:
2041 case Match_LoadStoreExtend32_16:
2044 case Match_LoadStoreExtend64_1:
2047 case Match_LoadStoreExtend64_2:
2050 case Match_LoadStoreExtend64_4:
2053 case Match_LoadStoreExtend64_8:
2056 case Match_LoadStoreExtend64_16:
2059 case Match_LoadStoreSImm7_4:
2062 case Match_LoadStoreSImm7_8:
2065 case Match_LoadStoreSImm7_16:
2068 case Match_LoadStoreSImm9:
2071 case Match_LoadStoreUImm12_1:
2074 case Match_LoadStoreUImm12_2:
2077 case Match_LoadStoreUImm12_4:
2080 case Match_LoadStoreUImm12_8:
2083 case Match_LoadStoreUImm12_16:
2086 case Match_LogicalSecondSource:
2089 case Match_MOVWUImm16:
2092 case Match_MRS:
2095 case Match_MSR:
2098 case Match_NamedImm_at:
2101 case Match_NamedImm_dbarrier:
2104 case Match_NamedImm_dc:
2107 case Match_NamedImm_ic:
2110 case Match_NamedImm_isb:
2113 case Match_NamedImm_prefetch:
2116 case Match_NamedImm_tlbi:
2119 case Match_UImm16:
2122 case Match_UImm3:
2125 case Match_UImm4:
2128 case Match_UImm5:
2131 case Match_UImm6:
2134 case Match_UImm7:
2137 case Match_Width32:
2140 case Match_Width64:
2151 case k_CondCode:
2154 case k_FPImmediate:
2157 case k_ImmWithLSL:
2161 case k_Immediate:
2164 case k_Register:
2167 case k_Token:
2170 case k_ShiftExtend:
2174 case k_SysReg: {
