Lines Matching refs:UseMI
2268 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI,
2292 const MCInstrDesc &UseMCID = UseMI->getDesc();
2295 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR)
2301 unsigned UseOpc = UseMI->getOpcode();
2316 Commute = UseMI->getOperand(2).getReg() != Reg;
2368 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg();
2369 bool isKill = UseMI->getOperand(OpIdx).isKill();
2371 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(),
2372 UseMI, UseMI->getDebugLoc(),
2376 UseMI->setDesc(get(NewUseOpc));
2377 UseMI->getOperand(1).setReg(NewReg);
2378 UseMI->getOperand(1).setIsKill();
2379 UseMI->getOperand(2).ChangeToImmediate(SOImmValV2);
3278 const MachineInstr *UseMI,
3287 const MCInstrDesc *UseMCID = &UseMI->getDesc();
3300 if (UseMI->isBundle()) {
3302 const MachineInstr *NewUseMI = getBundledUseMI(&getRegisterInfo(), UseMI,
3307 UseMI = NewUseMI;
3309 UseMCID = &UseMI->getDesc();
3319 if (UseMI->isBranch())
3339 if (DefMO.isImplicit() || UseMI
3344 unsigned UseAlign = UseMI->hasOneMemOperand()
3345 ? (*UseMI->memoperands_begin())->getAlignment() : 0;
3652 const MachineInstr *UseMI, unsigned UseIdx) const {
3654 unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask;
3661 int Latency = computeOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx,