Lines Matching refs:BuildMI
5741 MachineInstrBuilder MIB = BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr);
5745 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
5747 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
5757 MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(newval).addReg(ptr);
5761 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri))
5763 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
5847 MachineInstrBuilder MIB = BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr);
5854 AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2).
5857 AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2).
5861 MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2).addReg(ptr);
5865 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri))
5867 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
5960 MachineInstrBuilder MIB = BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr);
5968 AddDefaultPred(BuildMI(BB, dl, TII->get(extendOpc), oldval)
5974 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
5976 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2MOVCCr : ARM::MOVCCr), scratch2)
5979 MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2).addReg(ptr);
5983 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri))
5985 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
6069 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2LDREXD))
6075 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::LDREXD))
6078 BuildMI(BB, dl, TII->get(TargetOpcode::COPY), destlo)
6080 BuildMI(BB, dl, TII->get(TargetOpcode::COPY), desthi)
6088 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr :
6092 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
6105 AddDefaultPred(BuildMI(BB, dl, TII->get(Op1), tmpRegLo)
6109 AddDefaultPred(BuildMI(BB, dl, TII->get(Op2), tmpRegHi)
6122 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
6133 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2STREXD), storesuccess)
6140 BuildMI(BB, dl, TII->get(TargetOpcode::IMPLICIT_DEF), UndefPair);
6141 BuildMI(BB, dl, TII->get(TargetOpcode::INSERT_SUBREG), r1)
6145 BuildMI(BB, dl, TII->get(TargetOpcode::INSERT_SUBREG), StorePair)
6151 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::STREXD), storesuccess)
6155 AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri))
6157 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
6215 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1)
6221 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2)
6225 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg3)
6228 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12))
6242 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1)
6246 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2)
6251 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3)
6255 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4)
6260 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tADDrSPi), NewVReg5)
6263 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi))
6274 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1)
6279 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2)
6282 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12))
6369 BuildMI(TrapBB, dl, TII->get(trap_opcode));
6390 MIB = BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup));
6402 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)
6408 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri))
6413 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1)
6419 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2)
6424 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr))
6429 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc))
6435 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg3)
6442 BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg4)
6447 BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT))
6454 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1)
6460 AddDefaultPred(BuildMI
6475 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci))
6478 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr))
6483 BuildMI(DispatchBB, dl, TII->get(ARM::tBcc))
6489 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLSLri), NewVReg2)
6495 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLEApcrelJT), NewVReg3)
6500 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg4)
6510 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5)
6518 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6)
6524 BuildMI(DispContBB, dl, TII->get(ARM::tBR_JTr))
6530 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1)
6536 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))
6541 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1)
6547 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2)
6552 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
6567 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp))
6571 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
6576 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc))
6583 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3)
6587 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4)
6596 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5)
6603 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd))
6609 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTr))
6778 AddDefaultPred(BuildMI(*BB, MI, dl,
6782 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)
6785 AddDefaultPred(BuildMI(*BB, MI, dl,
6789 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)
6793 AddDefaultPred(BuildMI(*BB, MI, dl,
6798 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)
6816 AddDefaultPred(BuildMI(*BB, MI, dl,
6820 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)
6824 AddDefaultPred(BuildMI(*BB, MI, dl,
6829 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(strOpc), destOut)
6877 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2MOVi16), VReg1)
6881 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2MOVTi16), varEnd)
6895 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::LDRcp))
6915 BuildMI(*BB, BB->begin(), dl, TII->get(ARM::PHI), varPhi)
6918 BuildMI(BB, dl, TII->get(ARM::PHI), srcPhi)
6921 BuildMI(BB, dl, TII->get(ARM::PHI), destPhi)
6929 AddDefaultPred(BuildMI(BB, dl, TII->get(ldrOpc), scratch)
6932 AddDefaultPred(BuildMI(BB, dl, TII->get(strOpc), destLoop)
6935 AddDefaultPred(BuildMI(BB, dl, TII->get(ldrOpc), scratch)
6938 AddDefaultPred(BuildMI(BB, dl, TII->get(strOpc), destLoop)
6942 AddDefaultPred(BuildMI(BB, dl, TII->get(ldrOpc), scratch)
6946 AddDefaultPred(BuildMI(BB, dl, TII->get(strOpc), destLoop)
6952 MachineInstrBuilder MIB = BuildMI(BB, dl,
6958 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
6980 AddDefaultPred(BuildMI(*BB, StartOfExit, dl,
6984 AddDefaultPred(BuildMI(*BB, StartOfExit, dl, TII->get(strOpc), destOut)
6988 AddDefaultPred(BuildMI(*BB, StartOfExit, dl,
6992 AddDefaultPred(BuildMI(*BB, StartOfExit, dl, TII->get(strOpc), destOut)
7040 BuildMI(*BB, MI, dl, TII->get(NewOpc))
7061 MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc));
7221 BuildMI(BB, dl, TII->get(ARM::tBcc)).addMBB(sinkMBB)
7236 BuildMI(*BB, BB->begin(), dl,
7257 AddDefaultPred(BuildMI(BB, dl,
7260 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri))
7266 AddDefaultPred(BuildMI(BB, dl,
7269 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
7279 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc))
7282 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2B)).addMBB(exitMBB));
7284 BuildMI(BB, dl, TII->get(ARM::B)) .addMBB(exitMBB);
7344 AddDefaultPred(BuildMI(BB, dl,
7349 BuildMI(BB, dl,
7356 BuildMI(*RSBBB, RSBBB->begin(), dl,
7363 BuildMI(*SinkBB, SinkBB->begin(), dl,
