Lines Matching refs:MemOps
100 MemOpQueue &MemOps,
116 unsigned Scratch, MemOpQueue &MemOps,
119 void AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps);
363 // MergeOpsUpdate - call MergeOps and update MemOps and merges accordingly on
366 MemOpQueue &memOps,
377 const unsigned insertPos = memOps[insertAfter].Position;
380 for (unsigned i = 0, e = memOps.size(); i != e; ++i) {
386 if (memOps[i].Position < insertPos && memOps[i].isKill) {
387 unsigned Reg = memOps[i].Reg;
396 unsigned Reg = memOps[i].Reg;
399 bool isKill = memOps[i].isKill || KilledRegs.count(Reg);
403 for (MIOperands MO(memOps[i].MBBI); MO.isValid(); ++MO) {
413 MachineBasicBlock::iterator Loc = memOps[insertAfter].MBBI;
422 // Remove kill flags from any memops that come before insertPos.
427 int Idx = memOps[j].MBBI->findRegisterUseOperandIdx(Reg, true);
429 memOps[j].MBBI->getOperand(Idx).setIsKill(false);
430 memOps[j].isKill = false;
432 memOps[i].isKill = true;
434 MBB.erase(memOps[i].MBBI);
437 memOps[i].Merged = true;
438 memOps[i].MBBI = Merges.back();
439 memOps[i].Position = insertPos;
449 unsigned Scratch, MemOpQueue &MemOps,
452 int Offset = MemOps[SIndex].Offset;
455 MachineBasicBlock::iterator Loc = MemOps[SIndex].MBBI;
481 for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) {
482 int NewOffset = MemOps[i].Offset;
483 const MachineOperand &MO = MemOps[i].MBBI->getOperand(0);
498 MergeOpsUpdate(MBB, MemOps, SIndex, i, insertAfter, SOffset,
501 MemOps, Merges);
505 if (MemOps[i].Position > MemOps[insertAfter].Position)
510 MergeOpsUpdate(MBB, MemOps, SIndex, MemOps.size(), insertAfter, SOffset,
1034 void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps) {
1035 MachineBasicBlock::iterator Loc = MemOps[0].MBBI;
1036 unsigned Position = MemOps[0].Position;
1037 for (unsigned i = 1, e = MemOps.size(); i != e; ++i) {
1038 if (MemOps[i].Position < Position) {
1039 Position = MemOps[i].Position;
1040 Loc = MemOps[i].MBBI;
1221 MemOpQueue MemOps;
1268 MemOps.push_back(MemOpQueueEntry(Offset, Reg, isKill, Position, MBBI));
1280 if (Offset > MemOps.back().Offset) {
1281 MemOps.push_back(MemOpQueueEntry(Offset, Reg, isKill,
1286 for (MemOpQueueIter I = MemOps.begin(), E = MemOps.end();
1289 MemOps.insert(I, MemOpQueueEntry(Offset, Reg, isKill,
1322 AdvanceRS(MBB, MemOps);
1331 CurrPred, CurrPredReg, Scratch, MemOps, Merges);
1343 if (!MemOps[i].Merged)
1344 if (MergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI))
1352 if (MergeBaseUpdateLoadStore(MBB, MemOps[0].MBBI, TII, Advance, MBBI)) {
1364 MemOps.clear();
1498 SmallPtrSet<MachineInstr*, 4> &MemOps,
1506 if (I->isDebugValue() || MemOps.count(&*I))
1696 SmallPtrSet<MachineInstr*, 4> MemOps;
1699 MemOps.insert(Ops[i]);
1708 MemOps, MemRegs, TRI);
1716 && (MemOps.count(InsertPos) || InsertPos->isDebugValue()))
