Lines Matching refs:isAdd
442 bool isAdd = true;
447 isAdd = false;
453 isAdd = false;
457 return isAdd;
740 bool isAdd = true;
746 isAdd = false ; // 'U' bit is set as part of the fixup.
765 isAdd = false;
770 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups);
774 if (isAdd)
795 bool isAdd = Imm8 >= 0;
806 if (isAdd)
820 bool isAdd = true;
826 isAdd = false ; // 'U' bit is set as part of the fixup.
835 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups);
845 if (isAdd)
946 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
955 // {12} = isAdd
965 if (isAdd)
975 // {12} isAdd
988 // {12} isAdd
993 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
1003 return Binary | (isAdd << 12) | (isReg << 13);
1009 // {4} isAdd
1013 bool isAdd = MO1.getImm() != 0;
1014 return CTX.getRegisterInfo().getEncodingValue(MO.getReg()) | (isAdd << 4);
1021 // {8} isAdd
1027 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1033 return Imm8 | (isAdd << 8) | (isImm << 9);
1041 // {8} isAdd
1062 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1068 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1118 bool isAdd;
1124 isAdd = false; // 'U' bit is handled as part of the fixup.
1138 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1143 if (isAdd)
