Lines Matching refs:Arg
2464 // If this is the first part of an i64 arg,
2520 SDValue Chain, SDValue Arg, DebugLoc DL,
2525 return DAG.getStore(Chain, DL, Arg, PtrOff, MachinePointerInfo(), false,
2530 int FI = MFI->CreateFixedObject(Arg.getValueSizeInBits() / 8, Offset, false);
2532 return DAG.getStore(Chain, DL, Arg, FIN, MachinePointerInfo(),
2644 SDValue Arg = OutVals[i];
2649 // ByVal Arg.
2656 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg,
2670 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg);
2673 Arg, DAG.getConstant(0, MVT::i32));
2675 Arg, DAG.getConstant(1, MVT::i32));
2687 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, LocVT, Arg);
2690 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, LocVT, Arg);
2693 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, LocVT, Arg);
2700 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2710 Chain, Arg, DL, IsTailCall, DAG));
3443 dbgs() << "Formal Arg #" << I << " has unhandled type "
3550 // If Align > RegSize, the first arg register must be even.
3603 // Copy arg registers.
3620 // Copy byVal arg to registers and stack.
3625 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
3641 SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
3669 SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
3704 // Copy remainder of byval arg to it with memcpy.
3706 SDValue Src = DAG.getNode(ISD::ADD, DL, PtrTy, Arg,
