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Lines Matching refs:Arg

2908   SDValue Arg;
2925 SDValue Arg = TailCallArgs[i].Arg;
2929 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, FIN,
2979 SDValue Arg, int SPDiff, unsigned ArgOffset,
2982 uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8;
2987 Info.Arg = Arg;
3043 SDValue Arg, SDValue PtrOff, int SPDiff,
3059 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff,
3062 } else CalculateTailCallArgDest(DAG, MF, isPPC64, Arg, SPDiff, ArgOffset,
3568 SDValue Arg = OutVals[i];
3589 CreateCopyOfByValArgument(Arg, PtrOff,
3603 Arg = PtrOff;
3609 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3619 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff,
3624 CalculateTailCallArgDest(DAG, MF, false, Arg, SPDiff, LocMemOffset,
3667 PPCTargetLowering::createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
3672 SDValue MemcpyCall = CreateCopyOfByValArgument(Arg, PtrOff,
3771 SDValue Arg = OutVals[i];
3783 if (Arg.getValueType() == MVT::i32) {
3786 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg);
3809 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg,
3824 Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr,
3844 Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, PtrOff,
3860 Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr,
3880 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const);
3896 switch (Arg.getValueType().getSimpleVT().SimpleTy) {
3901 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
3903 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
3912 RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
3919 if (Arg.getValueType().getSimpleVT().SimpleTy == MVT::f32) {
3925 SDValue Store = DAG.getStore(Chain, dl, Arg, StoreOff,
3943 if (Arg.getValueType() == MVT::f32) {
3948 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
3973 SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff,
4001 RegsToPass.push_back(std::make_pair(VR[VR_idx++], Arg));
4003 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
4152 SDValue Arg = OutVals[i];
4164 if (isPPC64 && Arg.getValueType() == MVT::i32) {
4167 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg);
4180 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg,
4191 Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, AddPtr,
4201 Chain = CallSeqStart = createMemcpyOutsideCallSeq(Arg, PtrOff,
4210 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const);
4226 switch (Arg.getValueType().getSimpleVT().SimpleTy) {
4231 RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
4233 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
4242 RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
4245 SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff,
4257 if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 && !isPPC64){
4272 if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 &&
4277 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
4283 ArgOffset += Arg.getValueType() == MVT::f32 ? 4 : 8;
4304 SDValue Store = DAG.getStore(Chain, dl, Arg, PtrOff,
4332 RegsToPass.push_back(std::make_pair(VR[VR_idx++], Arg));
4335 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
4354 SDValue Arg = OutVals[i];
4361 LowerMemOpCallTo(DAG, MF, Chain, Arg, PtrOff, SPDiff, ArgOffset,
4433 SDValue Arg = OutVals[i];
4439 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
4442 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
4445 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
4449 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);