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Lines Matching refs:PPCTargetLowering

70 PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
520 unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty) const {
538 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
604 EVT PPCTargetLowering::getSetCCResultType(EVT VT) const {
934 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base,
978 bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp,
1064 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
1092 bool PPCTargetLowering::SelectAddressRegImmShift(SDValue N, SDValue &Disp,
1178 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
1289 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
1312 SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
1331 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
1344 SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
1430 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
1463 SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
1506 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG,
1614 SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,
1619 SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
1662 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG,
1846 PPCTargetLowering::LowerFormalArguments(SDValue Chain,
1867 PPCTargetLowering::LowerFormalArguments_32SVR4(
2087 PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT,
2105 PPCTargetLowering::setMinReservedArea(MachineFunction &MF, SelectionDAG &DAG,
2127 PPCTargetLowering::LowerFormalArguments_64SVR4(
2416 PPCTargetLowering::LowerFormalArguments_Darwin(
2855 PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
2996 SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(SelectionDAG & DAG,
3276 PPCTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
3322 PPCTargetLowering::FinishCall(CallingConv::ID CallConv, DebugLoc dl,
3418 PPCTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
3452 PPCTargetLowering::LowerCall_32SVR4(SDValue Chain, SDValue Callee,
3460 // See PPCTargetLowering::LowerFormalArguments_32SVR4() for a description
3667 PPCTargetLowering::createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
3684 PPCTargetLowering::LowerCall_64SVR4(SDValue Chain, SDValue Callee,
4055 PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee,
4403 PPCTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
4414 PPCTargetLowering::LowerReturn(SDValue Chain,
4464 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG,
4497 PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const {
4521 PPCTargetLowering::getFramePointerFrameIndex(SelectionDAG & DAG) const {
4546 SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
4569 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
4642 SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
4678 SDValue PPCTargetLowering::LowerSINT_TO_FP(SDValue Op,
4773 SDValue PPCTargetLowering::LowerFLT_ROUNDS_(SDValue Op,
4838 SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const {
4867 SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const {
4896 SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const {
4997 SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
5232 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
5397 SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
5463 SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
5481 SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {
5542 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
5588 void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
5684 PPCTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
5745 PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr *MI,
5876 PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
6260 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
6519 void PPCTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
6559 PPCTargetLowering::ConstraintType
6560 PPCTargetLowering::getConstraintType(const std::string &Constraint) const {
6587 PPCTargetLowering::getSingleConstraintMatchWeight(
6628 PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
6657 void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
6727 bool PPCTargetLowering::isLegalAddressingMode(const AddrMode &AM,
6764 bool PPCTargetLowering::isLegalAddressImmediate(int64_t V,Type *Ty) const{
6769 bool PPCTargetLowering::isLegalAddressImmediate(GlobalValue* GV) const {
6773 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op,
6807 SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
6835 PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
6851 EVT PPCTargetLowering::getOptimalMemOpType(uint64_t Size,
6863 bool PPCTargetLowering::allowsUnalignedMemoryAccesses(EVT VT,
6893 bool PPCTargetLowering::isFMAFasterThanMulAndAdd(EVT VT) const {
6909 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {