Lines Matching defs:OpC
90 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
183 unsigned Opc = 0;
189 Opc = X86::MOV8rm;
193 Opc = X86::MOV16rm;
197 Opc = X86::MOV32rm;
202 Opc = X86::MOV64rm;
207 Opc = Subtarget->hasAVX() ? X86::VMOVSSrm : X86::MOVSSrm;
210 Opc = X86::LD_Fp32m;
216 Opc = Subtarget->hasAVX() ? X86::VMOVSDrm : X86::MOVSDrm;
219 Opc = X86::LD_Fp64m;
230 DL, TII.get(Opc), ResultReg), AM);
241 unsigned Opc = 0;
253 case MVT::i8: Opc = X86::MOV8mr; break;
254 case MVT::i16: Opc = X86::MOV16mr; break;
255 case MVT::i32: Opc = X86::MOV32mr; break;
256 case MVT::i64: Opc = X86::MOV64mr; break; // Must be in x86-64 mode.
258 Opc = X86ScalarSSEf32 ?
262 Opc = X86ScalarSSEf64 ?
266 Opc = X86::MOVAPSmr;
269 Opc = X86::MOVAPDmr;
275 Opc = X86::MOVDQAmr;
280 DL, TII.get(Opc)), AM).addReg(Val);
292 unsigned Opc = 0;
297 case MVT::i8: Opc = X86::MOV8mi; break;
298 case MVT::i16: Opc = X86::MOV16mi; break;
299 case MVT::i32: Opc = X86::MOV32mi; break;
303 Opc = X86::MOV64mi32;
307 if (Opc) {
309 DL, TII.get(Opc)), AM)
324 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g.
326 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT,
329 unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc,
541 unsigned Opc = 0;
552 Opc = X86::MOV64rm;
558 Opc = X86::MOV32rm;
564 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg);
1244 unsigned Opc = 0;
1247 Opc = X86::CMOVE16rr;
1250 Opc = X86::CMOVE32rr;
1253 Opc = X86::CMOVE64rr;
1269 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)
1500 unsigned OpC = 0;
1502 OpC = X86::ADD32rr;
1504 OpC = X86::ADD64rr;
1511 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(OpC), ResultReg)
1514 unsigned Opc = X86::SETBr;
1516 Opc = X86::SETOr;
1517 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg+1);
2040 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64;
2044 TII.get(Opc)), FI)
2046 Opc = ResVT == MVT::f32 ? X86::MOVSSrm : X86::MOVSDrm;
2048 TII.get(Opc), ResultReg + i), FI);
2121 unsigned Opc = 0;
2126 Opc = X86::MOV8rm;
2130 Opc = X86::MOV16rm;
2134 Opc = X86::MOV32rm;
2139 Opc = X86::MOV64rm;
2144 Opc = Subtarget->hasAVX() ? X86::VMOVSSrm : X86::MOVSSrm;
2147 Opc = X86::LD_Fp32m;
2153 Opc = Subtarget->hasAVX() ? X86::VMOVSDrm : X86::MOVSDrm;
2156 Opc = X86::LD_Fp64m;
2175 Opc = TLI.getPointerTy() == MVT::i32 ? X86::LEA32r : X86::LEA64r;
2178 TII.get(Opc), ResultReg), AM);
2209 TII.get(Opc), ResultReg),
2229 unsigned Opc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r;
2233 TII.get(Opc), ResultReg), AM);
2243 unsigned Opc = 0;
2249 Opc = X86::FsFLD0SS;
2252 Opc = X86::LD_Fp032;
2258 Opc = X86::FsFLD0SD;
2261 Opc = X86::LD_Fp064;
2271 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg);
